Commit Graph

269 Commits

Author SHA1 Message Date
Martin Roth 206020ccff Update arm-trusted-firmware submodule to upstream master
Updating from commit id a4c979ade:
2020-08-26 14:59:05 +0000 - (Merge changes I6bf1db15,I8631c34a,Id76ada14 into integration)

to commit id 7ad39818b:
2020-10-12 09:16:21 +0000 - (Merge "mediatek: mt8192: add GIC600 support" into integration)

This brings in 222 new commits.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Id186df36d90563f94f17cc210a6f634adc4ec61e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51463
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-03-16 11:18:21 +00:00
Martin Roth 50c667de52 Update amd_blobs submodule to upstream master
Updating from commit id 3b1a734:
2021-03-02 11:51:18 -0700 - (picasso: Update FSP to build 0x26)

to commit id 3a9d7cd:
2021-03-03 15:37:08 -0700 - (picasso: Update Dali SMU firmware)

This brings in 1 new commits.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Iff3b4ff667f97d3804bc66477f8a95a60e23b1a0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51459
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-15 01:37:53 +00:00
Martin Roth c381b194cc Update blobs submodule to upstream master
Updating from commit id 4fdfa1c:
2021-03-05 13:10:22 -0600 - (mb/amd/majolica: Update to use proper APCBs built for Majolica)

to commit id fc2d4e2:
2021-03-12 10:31:48 -0700 - (mb/google/guybrush: Add initial APCB)

This brings in 1 new commit.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I3003fdb8ba0bcfbc33452999c35a9a21775ecc10
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51462
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-03-15 01:22:33 +00:00
Matt Papageorge a37ec522e1 mb/amd/majolica: Update to use proper APCBs built for Majolica
Some of the previous binaries were incorrect and should not be used
for Majolica because they are templates instead of APCBs specifically
built for the board. This APCB update also places the UMA region under
4G and size 32 MB which is essential for video output.

TEST=Boot with UEFI BIOS and verify we can get to OS. Also verify memory
region size, base and alignment.

Change-Id: Id797e2ad5bd67815c09752aedc19dad7dcf8ad12
Signed-off-by: Matt Papageorge <matthewpapa07@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51014
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2021-03-10 23:28:19 +00:00
Nikolai Vyssotski 794f1e785d amd_blobs: update submodule pointer
Pick up build 0x26 Picasso FSP binaries. The changes include increased
FSPS UPD block size from 0x152 to 0x202.

Change-Id: I11fc199ca7bc6ee7431c59d35a60d9ebd977bf10
Signed-off-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51193
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2021-03-03 22:20:07 +00:00
Marshall Dawson d882bd478d amd_blobs: Update cezanne PSP Secure OS
Avoid a Secure OS Abort.  This prevents coreboot timing out on C2P
mailbox commands and allows HDT unlocking.

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I358530a1ba959ee1896e26a47853c9918ee124b4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51109
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-03-01 08:28:07 +00:00
Marshall Dawson 2c30a83d9b amd_blobs: Add cezanne whitelist bootloader
Advance the pointer to pick up the PSP whitelist bootloader.

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I45da509ee6f782cbe64e7099f3945129282060b4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51102
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-03-01 08:27:43 +00:00
Ritul Guru 8c80d9e612 3rdparty/blobs: advance submodule pointer.
This adds the apcb binary for Bilby.

Change-Id: I1487369bc72734e875c5a701f27ed2d6af41cd01
Signed-off-by: Ritul Guru <ritul.bits@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50496
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-02-11 21:34:52 +00:00
Patrick Georgi 841491c06f Update chromeec submodule to upstream master
Updating from commit id a1afae4:
2019-10-02 11:47:45 +0000 - (juniper: initial setup)

to commit id a2390f3:
2020-12-01 08:35:44 +0000 - (servo_v4/usb_pd_policy: Reject SNK->SRC power swap if CC_ALLOW_SRC not set)

This brings in 4022 new commits.

Change-Id: Ib13921aa78a60f88455223eff602296abc424ca8
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48212
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-06 10:47:13 +00:00
Tim Crawford 8818ddab82 3rdparty/intel-microcode: Update submodule to 20201118 release
Update submodule pointer to include microcode for CML-H and others.

Change-Id: Ide211b0b163f824a3cfa6500a73aea1e2176c652
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47914
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-23 17:00:15 +00:00
Felix Held e8ac16e7e9 3rdparty/blobs: advance submodule pointer
This pulls in the following changes:
* Drop geode_lx
* cpu/amd/model_fxx: Drop unused microcode
* cpu/amd/model_10xx: Drop unused microcode
* soc/mediatek/mt8192: Add dram.elf for DRAM full calibration
* soc/mediatek/mt8192: Add dpm binary
* soc/mediatek/mt8192: Add 4266Mbps flag for dpm & dram blob
* soc/mediatek/mt8192: add SPM firmware
* soc/mediatek/mt8192: Support 26M clock off in SPM
* soc/mediatek/mt8192: Add SSPM firmware
* soc/mediatek/mt8192: Add MCUPM firmware
* soc/mediatek/mt8192: Update MCUPM firmware
* soc/mediatek/mt8192: Support discrete DRAM modules
* mb/amd/majolica: Add APCB configuration files

Change-Id: I5c18349307421707fac71f392b785f3e2bef3acb
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-01-19 23:02:52 +00:00
Marshall Dawson 558a497f4c amd_blobs: Add new picasso VBIOS
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: Icf1571ae360cee5698626f0360e1408360e8a7f6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49362
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-01-14 01:16:08 +00:00
Marshall Dawson 663c17c78d amd_blobs: Advance pointer for picasso FSP 0x25
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I2aa5f353432cd8f79005153a06ac35c1e654f6f1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49223
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-01-08 15:18:07 +00:00
Nico Huber 3394040e79 3rdparty/libgfxinit: Update for Cannon Point support
We missed that Cannon Point, the PCH usually paired with Coffee, Whiskey
and Comet Lake, differs a bit from its predecessors. Hence, libgfxinit
now has a new Kconfig setting for the PCH.

Change-Id: I1c02c0d9abb7340aabe94185ee5e17ef4c2b0d36
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48764
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-28 17:27:21 +00:00
Felix Singer b8d614f8cc 3rdparty/fsp: Update submodule pointer to newest master
Newest master introduces the FSP for Tiger Lake client SKUs.

Change-Id: Id437faf72f1b8c5bc5310596bdab980e64614fa0
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48712
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-24 08:16:05 +00:00
Marshall Dawson b8602aa184 amd_blobs: Add cezanne files
Add blobs from the 1.0.0.1 release of CezannePI-FP6.

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: Iebfbe819ed429a7aed1882964061e1bc98f3bc39
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48647
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-12-17 13:27:06 +00:00
Marshall Dawson 535fa0a1cd 3rdparty/amd_blobs: Update pointer for picasso SMU and FSP
Add the newest SMU firmware and FSP blobs for the picasso project.
This supports Picasso, Dali, and Pollock devices.

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I75e6f3d2a59ed8b2e42afba3a6978574373ec4e5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48211
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-12-02 15:20:35 +00:00
Patrick Georgi 2f1d686ba6 Update vboot submodule to upstream master
Updating from commit id 9d4053d:
2020-11-20 01:51:08 +0000 - (Revert "Reland: Clean up implicit fall through.")

to commit id 48195e5:
2020-11-24 10:23:45 +0000 - (Makefile: Test for warning flags before using them)

This brings in 3 new commits.

Change-Id: I64f27f346df264cb6eeeb4e3203fcca7d35f7e83
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47906
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2020-11-25 16:26:48 +00:00
Julius Werner d656d08f5e Update vboot submodule to upstream master
Updating from commit id 4c523ed1:
    vboot2: Add support for modexp acceleration

to commit id 9d4053df:
    Revert "Reland: Clean up implicit fall through."

This brings in 32 new commmits. Among the changes are restored support
for older GCC/clang versions that do not support
__attribute__((fallthrough)).

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I1110664bf71b4376bcdd9ba934a95031ba872c1d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47784
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Joel Kitching <kitching@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-11-21 00:35:46 +00:00
Felix Held 4fc4a37038 3rdparty/amd_blobs: update submodule pointer
This now tracks a recently created upstream repository located at
https://github.com/amd/firmware_binaries

BUG=b:166107781

Change-Id: Ib193d646bb51cbf7b86f46828033e619c3f70e16
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46594
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-10-21 13:45:30 +00:00
Felix Held 059c7910eb 3rdparty/blobs: advance submodule pointer
The 3 commits commits from the blob repository this patch pulls in
remove executable flags from files in the repo that shouldn't have those
flags set:

* pi/amd/00660F01/FP4/AGESA.bin: Remove execute file mode bit
* Remove execute permission from all binaries
* Remove execute permission from plaintext files

Change-Id: I9c2b7c69f07e46bac466bfbfb277595c9fbc5a5a
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46554
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-10-20 15:04:03 +00:00
Kangheui Won 68e5fd2a5c Update vboot submodule to upstream master
Updating from commit id 4bb06cc1:
    COIL: Change denylist to blocklist

to commit id 4c523ed1:
    vboot2: Add support for modexp acceleration

This brings in 10 new commmits.

Change-Id: Iff6eb99c8ed3046b6fdb6c1e2892aab956f3b562
Signed-off-by: Kangheui Won <khwon@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45986
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Eric Peers <epeers@google.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2020-10-07 04:24:26 +00:00
Felix Held 4ae3e41deb 3rdparty/blobs: advance submodule pointer
This pulls in the following changes:
* soc/intel/baytrail/microcode.bin: Remove outdated microcode
* mainboard/amd/mandolin: add Cereme APCB

Change-Id: If6dd7881b346782635dec07710fe5c4449254e3c
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45851
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-30 21:45:06 +00:00
Eugene D Myers 61a77d6fcc 3rdparty: Add STM as a submodule
The patch incorporates the STM build as a part of the coreboot
build.  A separate patch lists and documents the options that
the developer can use.  In most cases the default options will
suffice.

Change-Id: I8c6e0c85edd4e2b0658791553bd9947656e8c796
Signed-off-by: Eugene D Myers <cedarhouse@comcast.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44687
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: ron minnich <rminnich@gmail.com>
2020-09-30 10:17:03 +00:00
Matt Papageorge ec0fb40893 Update amd_blobs submodule to upstream master
Updating from commit id 3bd9078:
2020-08-12 17:03:38 -0600 - (picasso: Update PSP to 0.8.6.7B)

to commit id e393a88:
2020-09-16 14:32:50 +0000 - (Update SMU firmware for Picasso, Pollock and Dali)

This brings in 1 new commits.

Change-Id: I1e317cf6ef4803577e9b353fb3313d001db228d7
Signed-off-by: Matt Papageorge <matthewpapa07@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45455
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-17 19:46:18 +00:00
Idwer Vollering 042edd389b Update vboot submodule to upstream master
Updating from commit id fefcaa65:
    vboot: adjust VB2_SECDATA_KERNEL_FLAGS in non-recovery path

to commit id 4bb06cc1:
    COIL: Change denylist to blocklist

This brings in 20 new commmits.

Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Change-Id: I0efef2f0ab6ecb89c8132cca2bd4ab7f71e85ced
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45299
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-12 20:53:25 +00:00
Philipp Deppenwiese 404a42bb3a 3rdparty: Add submodule intel-sec-tools
Project: https://github.com/9elements/converged-security-suite
License: BSD-3

Tooling for Intel platform security features

Change-Id: I7421b30eb38e64cf6b77b7e1c485c5700728997b
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45170
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-09 13:08:25 +00:00
Julius Werner 8e0f9f30f6 3rdparty/qc_blobs: Uprev to new HEAD (6b7fe498eb)
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I2de0c13000e5b1e32e9c1a6de3daa09acf6c321b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45057
Reviewed-by: Philip Chen <philipchen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-09 00:02:00 +00:00
Felix Singer dd9f635a60 3rdparty/fsp: Update submodule pointer to current master
Change-Id: I50bac5a70425495832649e0d6d6e91aad623f25c
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44953
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner
2020-09-03 21:13:36 +00:00
Julius Werner 0900bd0927 Update arm-trusted-firmware submodule to upstream master
Updating from commit id ace23683b:
2019-09-27 Merge changes from topic "ld/stm32-authentication" into
	   integration

to commit id a4c979ade:
2020-08-26 Merge changes I6bf1db15,I8631c34a,Id76ada14 into integration

This brings in 1825 new commits.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Id26301dae421eec61c10a2d18842053f3228c557
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44885
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-31 06:39:15 +00:00
Kangheui Won 4c875c8a5d Update vboot submodule to upstream master
Updating from commit id 3932b1c:
2020-08-19 02:09:04 +0000 - inclusive: change usage of
blacklist/whitelist

to commit id fefcaa6:
2020-08-24 04:32:03 +0000 - vboot: adjust VB2_SECDATA_KERNEL_FLAGS in
non-recovery path

This brings in 2 new commits.

Change-Id: Ia3ff764537b91f76ba6fa3ba2646638964800510
Signed-off-by: Kangheui Won <khwon@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44732
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2020-08-28 21:55:20 +00:00
Patrick Georgi 08d5be59be 3rdparty/vboot: Update to latest master
This also includes https://chromium-review.googlesource.com/2318026
which fixes an issue with duplicate symbols.

Change-Id: Icf450616b3bcd8b7c01261c913cd172625dbd6ba
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44623
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-08-20 21:06:27 +00:00
Marshall Dawson 3dc0294381 3rdparty/amd_blobs: Move the pointer for picasso update
Update PSP to 0.8.6.7B.

BUG=b:163857965
TEST=none

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I634dadccc51b36f9ac25c3238a794564ce580d5a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44427
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-13 20:28:41 +00:00
Angel Pons e4b22e7f19 3rdparty/intel-microcode: Update submodule to 20200616 release
Change-Id: Ia250765e2cb81d6a39ad00ebbab20e7b87fa42d1
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43758
Reviewed-by: Michael Niewöhner
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-08 20:32:22 +00:00
Marshall Dawson a1e578cc15 3rdparty/amd_blobs: Move pointer to 0.8.5.7B
BUG=b:162057232

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: Ifd4ac0655f7ada5ec10a266fdb2b930861959215
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44040
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-30 16:40:58 +00:00
Paul Menzel 12baa811f0 3rdparty/vboot: Update submodule pointer to upstream master
Building depthcharge master currently fails as depthcharge commit 74ca8ae5
(depthcharge: Hide dev mode timeout description) changed the function signature
according to vboot commit 59fd331b (vboot/ui: pass timer_disabled to
vb2ex_display_ui()), which is not yet present in the vboot checkout:

    $ make
    […]
        CC         drivers/ec/vboot_auxfw.depthcharge.o
    src/drivers/ec/vboot_auxfw.c: In function 'display_firmware_sync_screen':
    src/drivers/ec/vboot_auxfw.c:117:5: error: too many arguments to function 'vb2ex_display_ui'
         vb2ex_display_ui(VB2_SCREEN_FIRMWARE_SYNC,
         ^~~~~~~~~~~~~~~~
    In file included from /dev/shm/coreboot-1/3rdparty/vboot/firmware/include/vb2_api.h:18,
                     from src/drivers/ec/vboot_auxfw.c:17:
    /dev/shm/coreboot-1/3rdparty/vboot/firmware/include/../2lib/include/2api.h:1262:13: note: declared here
     vb2_error_t vb2ex_display_ui(enum vb2_screen screen,
                 ^~~~~~~~~~~~~~~~

So update the submodule pointer from commit 68de90c7 (Allow building for
non-CrOS environments) to commit ed23c084 (Reset EC when transitioning to dev
mode).

This brings in 7 new commits.

Change-Id: Icd5408fb824fc5da470774b7f493b916dff17832
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43517
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Joel Kitching <kitching@google.com>
2020-07-27 13:18:15 +00:00
Angel Pons 9b09093878 3rdparty/libgfxinit: Update submodule pointer
This brings in 4 new commits:
* c0db994 common/Makefile.inc: Factor out generation TLAs
* 3f86b0b Move `PSR_Off` out of `Power_And_Clocks_Haswell`
* 450c24c haswell: Make VGA on FDI work
* 3318bf2 Drop generation suffix from `Power_And_Clocks`

Change-Id: I023b0c2bb403b3a9c9fe575a78cd2cf2f20b112a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43559
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-07-20 12:09:47 +00:00
Angel Pons a92878152f 3rdparty/libhwbase: Update submodule pointer
This brings in 5 new commits:
* 69e9086 mutime: Make Sinfo an imported constant
* 9f87a10 time: Add T_First constant
* 4e22910 Makefile: Adapt $(space) definition
* d822df5 Makefile: Delay expansion of `$(ADAFLAGS)`
* a3edc6e Makefile: Add `-gnatw_R` to suppress spurious warning

Change-Id: I907e66fcf85da256a112a7069a3c551a6d8caaf0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43558
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-20 12:09:30 +00:00
Patrick Georgi 401671c7ab Update vboot submodule to upstream master
Updating from commit id c531000f:
2020-05-18 20:55:55 +0000 - (vboot: Add recovery reason code for CSE Lite SKU errors)

to commit id 68de90c7:
2020-07-02 11:31:05 +0000 - (Allow building for non-CrOS environments)

This brings in 59 new commits.

Change-Id: I7f3c30511ff4acc60e3581bdab89d685dc7beaa5
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43008
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-03 21:03:19 +00:00
Marshall Dawson b389f3aa0b 3rdparty/amd_blobs: Update Picasso PSP files
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I752804919227c1522374b93e08abee13396b2679
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42893
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2020-07-01 05:21:31 +00:00
Julius Werner bc1cb38ce1 Add qc_blobs repository
This patch adds a separate blobs repository for Qualcomm blobs,
analogous to the existing AMD blobs. Qualcomm's binary licenses allow
files to be redistributed and used by anyone, but they explicitly
require the user to agree to the license terms when just *downloading*
the binary (even if they're not using them to build any firmware). Some
community members do not like to have to agree to licenses for files
they're not actually using, so we are keeping these files separate from
the main blobs repository and adding an extra Kconfig to make sure the
user is aware of and must explicitly agree to this before downloading
these files.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I247746c1b633343064c9f32ef1556000475d6c4a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42548
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-06-30 08:57:03 +00:00
Felix Held 277e11b390 3rdparty/blobs: advance submodule pointer
Changes in 3rdparty/blobs:
* Update of the OCP Tiogapass Flash descriptor binary
* Move binary policy as README.md
* Markdownify README.md
* Add APCB binary for AMD Mandolin

Change-Id: I0c45969626f30dca42bba1f137e85ec0999fc671
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42544
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2020-06-19 21:21:51 +00:00
Felix Held 4824d747fc 3rdparty/amd_blobs: advance submodule pointer
This pulls in a newer version of the PSP-related blobs.

Change-Id: I6ff39260e9697512f78eb68435bd17ea83af35d5
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42346
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2020-06-15 00:04:04 +00:00
Raul E Rangel 8288555ead 3rdparty/amd_blobs: Update to include APCB_magic.bin
BUG=b:157140753
TEST=Built zork/trembyle and boot to OS.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I30a27a149ee7f368f45fdf5d4a081127f15e7629
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41736
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-05-27 15:59:45 +00:00
Jan Dabros 0cbe320ac8 submodules: Add new submodule 3rdparty/cmocka
Cmocka unit testing framework is used for writing and building coreboot
unit tests. This repo will be checked-in only when building some test
targets.

Signed-off-by: Jan Dabros <jsd@semihalf.com>
Change-Id: I3cdfd32f5bba795d5834ebeae1afff0f7006a0d1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41652
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-05-26 16:20:49 +00:00
Furquan Shaikh a54bfd5e95 Update vboot submodule to upstream master (commit hash c531000)
This change updates vboot submodule from commit hash 3aab301:
vboot: Convert reboot-related errors to vboot2-style

to commit hash c531000:
vboot: Add recovery reason code for CSE Lite SKU errors

Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: Ifbf5a09e6602c3f6833e6e8fbbd3cee3f60f1b47
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41536
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-05-26 15:07:52 +00:00
Felix Held 8a4536dfb7 3rdparty/amd_blobs: update submodule pointer
Change-Id: I468f0d3ab018ee0044e8de7df829c64940c7df2b
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41623
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2020-05-22 22:50:51 +00:00
Matt DeVillier bba5bfc7d2 3rdparty/libgfxinit: Update submodule pointer
Update libgfxinit submodule pointer to pull in handling for
presence straps bypass and some minor cleanup.

Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Change-Id: Id4a903383f32f352aa3595bd72bc5f6f0777171c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41515
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-05-20 23:37:31 +00:00
Bill XIE 02043c995b 3rdparty/libgfxinit: Update submodule pointer, again
6b95507ec5 has mistakenly reverted
the submodule pointer of 3rdparty/libgfxinit to cdbfce27, canceling
c844d14ca5.

This commit sets it back, recovering c844d14c.

Change-Id: Ib594e40a39ea83dd2238becb287f2516e7c54046
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41400
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-18 07:37:09 +00:00
Marshall Dawson 3e30c1284f 3rdparty/amd_blobs: Update with Picasso images
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: Ie886815ed354762ea52fd6a76169cf25576f8852
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41410
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2020-05-17 21:06:52 +00:00
Bill XIE 6b95507ec5 mainboard/lenovo/x230: Add ThinkPad x230s as a variant
The code is based on autoport and that for X230. Major differences are:
    - Only one DDR3 slot
    - HM77 PCH
    - M.2 socket instead of mini pci-e
    - no docking
    - no tpm

Tested:
    - CPU i5-3337U
    - Slotted DIMM 8GiB
    - Camera
    - pci-e and usb2 on M.2 slot with A key for wlan
    - sata and usb2  (no superspeed components) on M.2 slot with B key for wwan
    - On board SDHCI connected to pci-e
    - USB3 ports
    - libgfxinit-based graphic init
    - NVRAM options for North and South bridges
    - Sound
    - Thinkpad EC
    - S3
    - Linux 4.9 within Debian GNU/Linux stable, loaded from
      Seabios.

Untested:
    - Touch screen, which is said to work under ubuntu but not debian.

Change-Id: Ie537645d5ffaee799e79af2f821f80c3ebd2dfec
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41168
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-05-13 12:10:38 +00:00
Matt DeVillier c844d14ca5 3rdparty/libgfxinit: Update submodule pointer
Update libgfxinit submodule pointer to pull in workaround for VT-d.

Change-Id: I09f811bdb917365f4e97b7ab385781337d4c9cf7
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41181
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-11 09:27:41 +00:00
Yu-Ping Wu a4f8e40663 Update vboot submodule to upstream master
Updating from commit id 55154620:
  vboot: Add screens for recovery using disk

to commit id 3aab3014:
  vboot: Convert reboot-related errors to vboot2-style

This brings in 3 new commits.

Change-Id: I75be535e0b0f8080366b98e5ae2007452ad51738
Signed-off-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40845
Reviewed-by: Joel Kitching <kitching@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-01 06:27:49 +00:00
Felix Singer d1e0a466d3 3rdparty/intel-microcode: Update submodule pointer to 20191115 release
Update submodule pointer to 20191115 release to include the microcode
update for CML-U62, and others.

Signed-off-by: Felix Singer <felixsinger@posteo.net>
Change-Id: I4765a70be0b1182acd340a3c31a5d71fd0ab500f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40597
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-04-28 14:39:27 +00:00
Daisuke Nojiri 16a29e53ff Update vboot submodule to upstream master
Updating from commit id 46ff62c3:
  vboot: stop reading from ACPI for wpsw_boot

to commit id 55154620:
  vboot: Add screens for recovery using disk

This brings in 37 new commits.

Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: Ie184cbe6cc18cea540966d5801472ae821ea3e86
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40503
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-23 01:20:49 +00:00
Duncan Laurie c68902c210 Update vboot submodule pointer
Update the pointer for vboot_reference so it can be used to compile
depthcharge payload on the master branch.

Change-Id: I5fc6e05896d7221a1e48ca86c6b15081488302b5
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39840
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2020-04-14 09:47:56 +00:00
Nico Huber 4ce52903b0 3rdparty/libgfxinit: Update submodule pointer
Changes allow to use the integrated panel logic (power sequen-
cing and backlight control) for more connectors. The Kconfigs
GFX_GMA_PANEL_1_PORT and GFX_GMA_PANEL_2_PORT can now be set
to any port, e.g.

  config GFX_GMA_PANEL_1_PORT
          default "DP3"

Now that the panel logic is not tied to the `Internal` port
choice anymore, we can properly split it into `LVDS` and `eDP`.

This also adds Comet Lake PCI IDs which should still work the
same as Kaby and Coffee Lake.

Change-Id: I78b1b458ca00714dcbe7753a7beb4fb05d69986b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38921
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-09 08:20:12 +00:00
dnojiri 94b032ee5e Update vboot submodule to upstream master
Updating from commit id 8b9732f5:
2020-01-28 02:32:08 +0000 - (2lib: Fix struct vb2_hash the way it was
meant to be)

to commit id 5059062d:
2020-03-05 02:40:39 (EFS: Implement EFS2 and NO_BOOT mode)

This brings in 19 new commits.

Change-Id: Ic33500921e2c1a6109c24ad36713b41ab6e43de9
Signed-off-by: dnojiri <dnojiri@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39324
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Joel Kitching <kitching@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-07 20:44:32 +00:00
Joel Kitching 24d994afd2 Update vboot submodule to upstream master
Updating from commit id 0e97e25e:
2020-01-28 02:32:08 +0000 - (2lib: Fix struct vb2_hash the way it was meant to be)

to commit id 8b9732f5:
2020-02-18 05:55:01 +0000 - (vboot: do not call vb2_commit_data at end of VBSLK)

This brings in 36 new commits.

Change-Id: Icb0ab2c82c3264185171a32357944949afd2edce
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38953
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-02-19 12:07:57 +00:00
Patrick Georgi c294fe792c 3rdparty/blobs: Update to include STM binary
Change-Id: I5f053c1270bab71aeab3bb785c60417419736b44
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38717
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: ron minnich <rminnich@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2020-02-05 18:50:48 +00:00
Julius Werner 94e5ceea8c Update vboot submodule to upstream master
Updating from commit id 6ef33b99:
2019-11-22 Hung-Te Lin     futility: updater: refactor: unify
                           getting temp files for firmware images

to commit id 0e97e25e:
2020-01-23 Julius Werner   2lib: Fix struct vb2_hash the way it was
			   meant to be

Change-Id: I539aba2f283804f67ff3ff4f98324b3d10b2bb54
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38604
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Joel Kitching <kitching@google.com>
2020-02-03 16:53:14 +00:00
Julius Werner a211298d20 Update vboot submodule to upstream master
Updating from commit id 2843aa62:
2019-12-12 Julius Werner   2lib: Move firmware body size reporting to
			   separate function

to commit id f5367d59:
2020-01-20 Joel Kitching   vboot: translate recovery reason info from
			   vboot 2->1

This brings in 27 new commits.

Change-Id: I7d33337881fa2d36d6e562b0a390b56227cfad55
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38498
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Joel Kitching <kitching@google.com>
2020-01-22 22:00:46 +00:00
Nico Huber 933e6ff02d Populate 3rdparty/amd_blobs/
Kconfig default paths already point into `3rdparty/amd_blobs/`.

Change-Id: Ibb6f12183c48c7c07f76e794b4971c8b75116333
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38042
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2020-01-05 23:54:24 +00:00
Nico Huber bf15b2f7c3 3rdparty/fsp: Update to current master again
We had to role the `fsp` submodule back for a minute due to a regression
with the Coffee Lake binary. Intel silently mixed FSP 2.1 features into
the Coffee Lake FSP which is supposed to be FSP 2.0. With the stack and
heap usage partitioned for FSP using coreboot's stack (config FSP_USES_
CB_STACK), it works again.

To make this even messier: We already selected this Kconfig option for
Whiskey Lake, which is supposed to use the very same FSP binary. So with
either submodule pointer, something was always broken :-/

Change-Id: Id2aa17aaa2c843dcc7e0fb28779d1e5948da83c9
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37700
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jeremy Soller <jeremy@system76.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Mimoja <coreboot@mimoja.de>
2019-12-16 09:41:57 +00:00
Julius Werner f8e1764bb9 security/vboot: Ensure firmware body size is respected again
CB:36845 simplified how coreboot finds the RW CBFS after vboot has and
eliminated a layer of caching. Unfortunately, we missed the fact that
the former cached value didn't exactly match the FMAP section... it was
in fact truncated to the data actually used by vboot. That patch
unintentionally broke this truncation which leads to performance
regressions on certain CBFS accesses.

This patch makes use of a new API function added to vboot (CL:1965920)
which we can use to retrieve the real firmware body length as before.

(Also stop making all the vb2_context pointers const. vboot generally
never marks context pointers as const in its API functions, even when
the function doesn't modify the context. Therefore constifying it inside
coreboot just makes things weird because it prevents you from calling
random API functions for no reason. If we really want const context
pointers, that's a refactoring that would have to start inside vboot
first.)

This patch brings in upstream vboot commit 4b0408d2:
2019-12-12 Julius Werner   2lib: Move firmware body size reporting to
			   separate function

Change-Id: I167cd40cb435dbae7f09d6069c9f1ffc1d99fe13
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37680
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
2019-12-13 20:14:26 +00:00
Julius Werner 9b7c232924 Update vboot submodule to upstream master
Updating from commit id 695c56dc:
2019-12-04 Julius Werner   Makefile: Make loop unrolling fully
			   controllable by the caller

to commit id b10e5e32:
2019-12-09 Yu-Ping Wu      vboot: Make 2nvstorage.h private to
			   vboot_reference

This brings in 19 new commits.

Change-Id: I9cdccd25422aee26620d48d31f83bcf32a7b4809
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37717
Reviewed-by: Mathew King <mathewk@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-13 20:14:06 +00:00
Christian Walter 8a2204896a 3rdparty/fsp: Set back commit to working version of the FSP
With CB:37564 (3rdparts/fsp: Update fsp submodule) a regression
has been introduced to CFL platforms, such that the FSP-M fails/is
broken. This commit sets the commit to checkout in the submodule
FSP back to a working version.

Change-Id: I8eac551211559962fc60e7edd46ff118d7bde830
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37669
Reviewed-by: Mimoja <coreboot@mimoja.de>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-13 09:00:01 +00:00
Johanna Schander 0b82b3d6fd 3rdparts/fsp: Update fsp submodule
The name for the CoffeeLake FSP.fd was changed to Fsp.fd.
Therefore the CoffeLake / WhiskeyLake default path was
changed.

Change-Id: I0f51e378fcaacb25392d8940a342fc968c730157
Signed-off-by: Johanna Schander <coreboot@mimoja.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37564
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-09 09:44:07 +00:00
Joel Kitching 1debc0c101 vboot: update VbExNvStorageWrite function
Going forwards, vb2ex_commit_data will be used to flush both
nvdata and secdata.

The patch that is circularly dependent on this lies between a patch that
makes vboot no longer build and the patch that fixes that, so we have to
pull the whole thing in at once to sort out the mess.

Updating from commit id 1c4dbaa0:
2019-11-18 Julius Werner   Makefile: Fix typo for MOCK_TPM

to commit id 695c56dc:
2019-12-04 Julius Werner   Makefile: Make loop unrolling fully
                           controllable by the caller

BUG=b:124141368, chromium:1006689
TEST=make clean && make test-abuild
BRANCH=none

Change-Id: Ia2612da0df101cd3c46151dbce728633a39fada1
Signed-off-by: Joel Kitching <kitching@google.com>
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37315
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2019-12-06 05:23:26 +00:00
Tim Wawrzynczak a4a512c68a Update vboot submodule to upstream master
Updating from commit id ecdca931:
2019-11-13 06:14:05 +0000 - (vboot: move vb2_context inside vb2_shared_data (persistent context))

to commit id 1c4dbaa0:
2019-11-19 06:31:23 +0000 - (Makefile: Fix typo for MOCK_TPM)

This brings in 17 new commits.

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I1952d7a26725e2c008b5009705b2e78ac0bb82df
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36936
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-20 13:30:21 +00:00
Patrick Georgi e5ca52bbba Update opensbi submodule to upstream master
Updating from commit id e561c63:
2019-10-02 17:03:58 +0530 - (lib: Fix coldboot race condition observed on emulators/simulators)

to commit id 215421c:
2019-11-11 16:40:34 -0800 - (lib: Remove date and time from init message)

This brings in 13 new commits and allows reproducible builds with
opensbi.

Change-Id: I0fb9e0921b017822defa8b56df5a0f3e014d7f33
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36866
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2019-11-16 20:39:09 +00:00
Frans Hendriks 7dfbaab6de 3rdparty/blobs: Add Facebook FBG1701 descriptor and Intel ME
Upgrade to blobs version with descriptor and Intel ME binary

BUG=N/A
TEST=booting Facebook FBG1701

Change-Id: I2143b94a81eebfb22d99833aaf1f3743983dd80c
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34442
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-15 13:17:08 +00:00
Joel Kitching 2332c7459e vboot: use vboot persistent context
vb2_context object is now stored on the workbuf as part of
vb2_shared_data.  Use vboot's new API functions vb2api_init
and vb2api_relocate to create and move the workbuf.

BUG=b:124141368, chromium:994060
TEST=Build locally
BRANCH=none

Change-Id: I051be1e47bf79b15a1689d49a5d4c031e9363dfa
Signed-off-by: Joel Kitching <kitching@google.com>
Also-Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/1902339
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36300
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
2019-11-15 10:37:13 +00:00
Joel Kitching 348002c305 Update vboot submodule to upstream master
Updating from commit id b2c8984d:
2019-10-01 06:01:59 +0000 - (vboot: fix compile error with MOCK_TPM)

to commit id 87276ffe:
2019-11-07 17:46:09 +0800 - (futility: updater: Clean up hard-coded section names to preserve)

This brings in 48 new commits.

Change-Id: Iabaadc63227b856d0a2b7f3b23fe8c41b28d8eae
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36813
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-11-14 11:31:54 +00:00
Marshall Dawson d9ccaefabe submodules: Add 3rdparty/amd_blobs
This is currently an empty repo.  The intention for amd_blobs may be
found in Documentation/soc/amd/amdblobs_license.md.  A subsequent
patch will make the repo's init and checkout optional based on a
Kconfig symbol.

Change-Id: Ia93fb2711beaea4cb1c8e5d71dc3a9e0facc5485
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36441
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-10-31 12:28:38 +00:00
Nico Huber 21961fc092 3rdparty/libgfxinit: Update submodule pointer
This includes a huge set of refactorings to support Core Display Clock
(CDClk) frequency switching based on the current mode requirements.

The CDClk is configurable since Haswell and runtime switching is suppor-
ted since Broadwell. Always using the lowest possible frequency setting
should allow some power-savings. While, on the upper end, we can support
higher resolution panels now, without having to change the static confi-
guration.

There have also been some smaller changes and fixes, including:
  o Parsing of eDP 1.4+ DPCD link rates, enables panels that don't
    advertise a maximum link rate but only individual ones.
  o DP support for Ibex Peak.
  o Corrected limit for HDMI on G45 to 165MHz.
  o Reworked GMBUS reset handling and timeouts, should help with
    stalled GMBUS controllers when unimplemented ports were probed
    by accident.

Tested on various boards from GM45 to KBL-R.

Change-Id: I0a90bd4afe2091699a46a5a1323af9723ff43018
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35898
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-10-29 10:46:41 +00:00
Patrick Georgi 8be1fdf26f Update arm-trusted-firmware submodule to upstream master
Updating from commit id 42cdeb93:
2019-09-13 12:09:21 +0000 - (Merge "stm32mp1: manage CONSOLE_FLAG_TRANSLATE_CRLF and cleanup driver" into integration)

to commit id ace23683:
2019-09-27 09:54:27 +0000 - (Merge changes from topic "ld/stm32-authentication" into integration)

This brings in 83 new commits.

Change-Id: I273b5014db76d307d8735d78a8fdd5db3d07146c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35625
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-10-03 18:30:08 +00:00
Patrick Georgi 22f009901d Update chromeec submodule to upstream master
Updating from commit id 860fe2962:
2018-12-29 05:45:29 -0800 - (mt_scp/ipi: Support host command.)

to commit id a1afae4e0:
2019-10-02 11:47:45 +0000 - (juniper: initial setup)

This brings in 1723 new commits.

Change-Id: Ieb4f00b21a4354bb634c3427c73260123b54ac2a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35624
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-10-03 04:43:36 +00:00
Patrick Georgi 4685e53fe6 Update opensbi submodule to upstream master
Updating from commit id ce228ee:
2019-07-02 11:11:08 +0530 - (include: Bump-up version to 0.4)

to commit id e561c63:
2019-10-02 17:03:58 +0530 - (lib: Fix coldboot race condition observed on emulators/simulators)

This brings in 44 new commits.

Change-Id: Ide6e3c2bb98e79750b40a9b8ca9f2f1d2c123628
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35314
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-10-03 04:43:28 +00:00
Patrick Georgi 193eefb2e8 Update vboot submodule to upstream master
Updating from commit id e6700f4c:
2019-08-13 04:36:52 +0000 - (vboot: update vboot2 functions to use new vb2_error_t)

to commit id b2c8984d:
2019-10-01 06:01:59 +0000 - (vboot: fix compile error with MOCK_TPM)

This brings in 71 new commits.

Change-Id: Id7cefa3ad5b30c955d18e469494fec32f6f58a48
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35315
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-10-03 04:43:17 +00:00
Elyes HAOUAS dd12d53494 3rdparty/chromeec: Update to latest master
It's been some time and there are 1420 new commits. Including one that
allows reproducible builds \o/ and one that breaks building with empty
$(CC) :-/

Change-Id: I5e81d5a2f1018481b9103fc5a1f4b8c72fb9deec
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30679
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-16 13:42:10 +00:00
Julius Werner b3f24b4884 arm64: Uprev Arm TF and adjust to BL31 parameter changes
This patch uprevs the Arm Trusted Firmware submodule to the new upstream
master (commit 42cdeb930).

Arm Trusted Firmware unified a bunch of stuff related to BL31 handoff
parameters across platforms which involved changing a few names around.
This patch syncs coreboot back up with that. They also made header
changes that now allow us to directly include all the headers we need
(in a safer and cleaner way than before), so we can get rid of some
structure definitions that were duplicated. Since the version of entry
point info parameters we have been using has been deprecated in Trusted
Firmware, this patch switches to the new version 2 parameter format.

NOTE: This may or may not stop Cavium from booting with the current
pinned Trusted Firmware blob. Cavium maintainers are still evaluating
whether to fix that later or drop the platform entirely.

Tested on GOOGLE_KEVIN (rk3399).

Change-Id: I0ed32bce5585ce191736f0ff2e5a94a9d2b2cc28
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34676
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2019-09-14 05:01:16 +00:00
Marty E. Plummer 1e02d73c73 3rdparty/ffs: add open-power ffs utils
These tools are used to manipulate open-power specific partitioning and
ecc algorithms.

Change-Id: I0657f76aab75190244d0e81c2b1a525e50af484d
Signed-off-by: Marty E. Plummer <hanetzer@startmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35007
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-25 07:37:11 +00:00
Joel Kitching 220ac049ba vboot: update vboot2 functions to use new vb2_error_t
To make explicit when vboot2 error codes should be returned,
use the new vb2_error_t type on all functions which return
VB2_ERROR_* constants.

Additionally, add required vboot submodule commit id e6700f4c:
    2019-07-31 14:12:30 +0800 - (vboot: update vboot2 functions to use new vb2_error_t)

NOTE: This patch was merged separately on the Chromium tree:
https://chromium-review.googlesource.com/c/1728499

BUG=b:124141368, chromium:988410
TEST=make clean && make test-abuild
BRANCH=none

Change-Id: I804c2b407e496d0c8eb9833be629b7c40118415c
Signed-off-by: Joel Kitching <kitching@google.com>
Cq-Depend: chromium:1728292
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34860
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-08-21 09:32:45 +00:00
Joel Kitching 057d1b9d7e Update vboot submodule to upstream master
Updating from commit id 9c906110:
2019-08-06 06:07:01 +0000 - (vboot/tpm: fix return type inconsistencies)

to commit id a5afd01f:
2019-08-08 11:02:44 -0700 - (Minor fixes for clang)

This brings in 6 new commits.

Change-Id: Ic334ce8a5f24a0119fa2aaf000ce76c4c9e4932a
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34859
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-08-21 09:32:14 +00:00
Dawei Chien bab69c3fe2 3rdparty/blobs: Update submodule for MT8183
Update the 3rdparty/blobs submodule to the newest HEAD, which
contains the SPM binary for MT8183 platforms
( https://review.coreboot.org/c/blobs/+/34543 ).

Change-Id: I505ec9fffd9ddd62fffbe9514cbba50625825693
Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34734
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-08 03:29:07 +00:00
Joel Kitching 6276dfee51 Update vboot submodule to upstream master
Updating from commit id dac763c7:
2019-05-10 10:43:55 -0700 - (Make vboot -Wtype-limits compliant)

to commit id 9c906110:
2019-08-06 06:07:01 +0000 - (vboot/tpm: fix return type inconsistencies)

This brings in 68 new commits.

Change-Id: Ia96347d8ed94db6f0ec5f5108cb98ab0c4087bd4
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33858
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-08-08 03:20:56 +00:00
Nico Huber 6c5e7c70ac 3rdparty/libgfxinit: Update submodule pointer
Update libgfxinit:

o Add support for ULX (CPU Y series) variants
o Add support for Kaby/Coffee/Whiskey/Amber Lakes
o Publish Read_EDID() procedure
o Fix certain GMBUS error conditions
o Fix DP training when clock recovery needed voltage-swing increase
o Fix scaling on eDP for BDW+

Change-Id: Ib252303708d2bb0524ecc47f498df45902ba774f
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31457
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2019-08-05 08:24:01 +00:00
Patrick Rudolph b5871e5ccf 3rdparty/opensbi: Bump version
Use latest OpenSBI that include support for dynamic firmware loader.

That allows us to use OpenSBI similar to BL31 on aarch64:
* coreboot loads the payload
* coreboot loads OpenSBI ELF right before payload handoff
* OpenSBI does platform lockdown and provides runtime services
* OpenSBI hands control to already loaded payload

The uncompressed compiled OpenSBI code is about 41KiB.

Required to boot GNU/Linux on qemu-riscv as some instructions needs to be
emulated by SBI.

Change-Id: If7ed706bc54a75fb583a8aa46fdd61ae7d18c546
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34139
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2019-07-28 09:35:21 +00:00
Julius Werner 47a7b37cbf 3rdparty/blobs: Update submodule
Uprev the 3rdparty/blobs submodule to the newest HEAD, which
contains the SSPM binary for MT8183 platforms
( https://review.coreboot.org/c/blobs/+/32698 ).

Change-Id: I8a4dfa7eaace1ea473f5970596c3201342e48927
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34494
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-23 20:24:01 +00:00
Bora Guvendik a88921e2b0 3rdparty/fsp: Update submodule pointer
Update fsp submodule pointer to Coffee Lake FSP 7.0.64.40

github commit:
59964173e1

Change-Id: I864404a03be63aa60e81db21af16d69cda2d4e12
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33642
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-02 16:11:03 +00:00
zaolin 15110f12cb Add intel-microcode submodule repository
Change-Id: Icc5ac0a8033e371ecf2b4b28ba45dab961e86b3f
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33550
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
2019-06-18 10:42:17 +00:00
Arthur Heymans 01c83a2e99 3rdparty/blobs: Update submodule, SNB improvements
The sandybridge systemagent-r6 blob is modified:
- To be more flexible about the location of the stack w.r.t. the heap
- Place the MRC pool right below the MRC_VAR region
- to work with the same DCACHE_RAM_BASE from the native raminit (could
  make the CAR linker symbols easily compatible if desired)

This allows CAR setup compatibility between mrc.bin and native
bootpath and also allows for BIOS/memory mappeds region larger than
8MB.

This changes the semantics of CONFIG_DACHE_RAM_MRC_VAR_SIZE to also
include the pool on top of MRC_VAR region.

TESTED on T520 (boots and resumes from S3 with mrc.bin).

Change-Id: I17d240656575b69a24718d90e4f2d2b7339d05a7
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33228
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-06-17 08:15:04 +00:00
Julius Werner e429d86655 3rdparty: Uprev vboot submodule to upstream master
This patch uprevs the vboot submodule to the new upstream HEAD commit

 dac763c782 Make vboot -Wtype-limits compliant

Change-Id: I363e218e019b25483bc4c06315ca4e0e34599daf
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32748
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Joel Kitching <kitching@google.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-05-13 09:32:04 +00:00
Nico Huber 47953d0ae0 3rdparty/libgfxinit: Update for runtime CPU detection
Beside one tiny fix for framebuffer scaling, this contains a major
refactoring of libgfxinit's configuration infrastructure. With this,
we are finally able to detect CPUs at runtime and only have to confi-
gure a CPU/GPU generation.

Change-Id: Iccf4557453878536f527e4a1902439a1961ab701
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32736
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-12 15:02:23 +00:00
Nico Huber a029b3f4a4 3rdparty/libhwbase: Update to current master
Beside some refactorings that don't affect coreboot, this contains
bd0ed91 (Makefile: Revise support for generated sources) that fixes
an issue with upcoming libgfxinit configuration changes.

Change-Id: Ib47aeff8f6426ae27ddbc235a954e3bd60029072
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32735
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-12 15:02:16 +00:00
Joel Kitching 0de835d52e Update vboot submodule to upstream master
Updating from commit id 304aa429:
2019-03-12 10:38:56 -0700 - (futility: updater: Unit test for preserving sections using FMAP flags)

to commit id e7edff66:
2019-05-03 07:02:32 -0700 - (vboot: implement DISPLAY_INIT context and SD flag)

This brings in 45 new commits.

Change-Id: I7493e43bddc553f9724de46130ccb4cb44e18573
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32612
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-05-07 07:42:59 +00:00
Matt DeVillier 73b0136fa3 3rdparty/fsp: Update submodule pointer to upstream master
Update submodule pointer to pull in newly-updated Braswell FSP.

Adjust FSP_FD_PATH for soc/cannonlake due to filename case change.

Change-Id: I02ee0d32fd4c04cd4971eff20fc5a7de3f9b07ec
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32420
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2019-04-25 15:52:53 +00:00
zaolin 29035f3c36 3rdparty/opensbi: Add submodule
* Add opensbi for RISC-v

Change-Id: I1a6baa6b6c05095ff5545492aabf7408a23af181
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32418
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-04-24 08:46:25 +00:00
Joel Kitching 6b8a29e8b9 Update vboot submodule to upstream master
Updating from commit id 1e177741:
2019-02-14 05:27:16 -0800 - (vboot: rename VB2_DISABLE_DEVELOPER_MODE)

to commit id 304aa429:
2019-03-12 10:38:56 -0700 - (futility: updater: Unit test for preserving sections using FMAP flags)

This brings in 18 new commits.

Change-Id: Ie2889ed0217c38734eb2c496ca20f95b6a12b102
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31872
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-14 11:39:55 +00:00