Commit Graph

1381 Commits

Author SHA1 Message Date
Felix Held 91795a6da1 libpayload;arch,cpu/x86: drop USE_MARCH_586 Kconfig option
Only the Intel Quark SoC selected this option and that SoC was dropped
in commit 531023285e ("soc/intel/quark: Drop support"), so drop this
Kconfig option too.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic4f1c7530cd8ac7a1945b1493a2d53a7904daa06
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75473
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-05-27 00:29:02 +00:00
Felix Held c7921cd859 payloads/libpayload/configs: drop config.galileo
The Galileo board was dropped in commit 037c25d4dd ("mb/intel/
galileo: Drop support"), so also drop this config file.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8c85dc03c3a4a016d6e13f1bee170d1bc6439470
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75472
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
2023-05-27 00:26:59 +00:00
Maximilian Brune 9d475bf6de libpayload/arch/x86: Update API handling of CBTABLE handoff
The payload API of coreboot described in
https://www.coreboot.org/Payload_API does not reflect the current
handoff mechanism to hand the coreboot tables off. Therefore the
arguments supplied by coreboot (cbtable) will currently never be parsed
correctly and libpayload has to search for the coreboot tables by
iterating through memory.

This patch removes the old payload API implementation and just takes the
coreboot table pointer from the first argument on the stack.

Tested: started prodrive/atlas with coreinfo payload

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I51fb0cfc81043cbfe3fc9c8ea0776add2d6a42b2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74965
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-05-24 11:49:51 +00:00
Felix Singer 74b4bd0e92 tree: Replace `egrep` with `grep -E`
For compatibility reasons, egrep is just a wrapper around grep today.
Thus, replace it with `grep -E`.

Change-Id: Ief08a22e4cd7211a3fee278492c95d37f9e058fa
Signed-off-by: Felix Singer <felix.singer@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2023-04-06 19:54:44 +00:00
Thomas Heijligen 5dbd3df03c libpayload: strings.h: Use builtin __ffs instead of included one
Change-Id: Ie4d0b1b19ce6524341449df8bfabc66bff7bd97e
Signed-off-by: Thomas Heijligen <src@posteo.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70118
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2023-03-07 17:11:05 +00:00
Thomas Heijligen c0c62ebbae libpayload: bin/lpgcc allow to call without files
When building libflashrom ontop of libpayload, meson calls the lpgcc
wrapper with -xc but without a file to obtain information about the C
compiler. To make this work guard $_LIBGCC with -xnone in the lpgcc
wrapper. -xnone tells the compiler to interpret the following files of
libpayload by their suffix, not the privious given -x option.

Change-Id: I9e037ff44c0a6d0585d8a6f8aeabae6e651142e2
Signed-off-by: Thomas Heijligen <src@posteo.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70117
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2023-03-07 17:10:36 +00:00
Elyes Haouas 5331462e9e libpayload: Use __func__ instead of old __FUNCTION__
Change-Id: Ic3c22ac101a2ff44f97b2ac3fe3c0a89391718de
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72380
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2023-02-17 16:19:44 +00:00
Thomas Heijligen 3f9613bf6d commonlib/bsd, libpayload: Do not include helpers.h in stddef.h
`stddef.h` should only provide the definitions defined by ISO or Posix.
The included `commonlib/bsd/helpers.h` provide a lot of non standard
definitions that may interfere with definitions from the application.

Change-Id: Ia71edbc3ffe6694ff4b971decf3a41f915264bc8
Signed-off-by: Thomas Heijligen <src@posteo.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70116
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-02-16 17:55:37 +00:00
Thomas Heijligen 3d91563c98 libpayload/string: add strndup() function
Change-Id: Ie509e49f21fb537692704ac6527efa09649164e3
Signed-off-by: Thomas Heijligen <src@posteo.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70115
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-02-16 17:54:51 +00:00
Yidi Lin 70409217e7 libpayload: Add VBOOT_SHA_ARMV8_CE config
Add Kconfig option for VBOOT_SHA_ARMV8_CE, which will use ARMv8 Crypto
Extension for SHA256[1] instead of software implementation.

[1] https://crrev.com/c/4170144

BUG=b:263514393
BRANCH=corsola
TEST='vboot kernel verification' gets 111 msecs improvement on
Tentacruel.
Before:
1100:finished vboot kernel verification                905,150 (123,518)

After:
1100:finished vboot kernel verification                787,277 (12,254)

Cq-Depend: chromium:4170144, chromium:4242678
Change-Id: If92830830a0658dfad2a066e9efa624783865cf2
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72710
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2023-02-16 15:04:24 +00:00
Elyes Haouas 9a1d01f48e payloads/libpayload/arch/x86/rom_media.c: Change log level message
Move a warning message from BIOS_INFO to BIOS_WARNING log level.

Change-Id: I4210901a183b54e47fa62a6146ce754c544aab2c
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71157
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-12-22 03:27:02 +00:00
Thomas Heijligen 2332d29ba9 libpayload: Fix compiler warnings
Following warnings occur when compiling with
`i386-elf-gcc (coreboot toolchain v2022-09-18_c8870b1334) 11.2.0`

drivers/serial/8250.c:75: [-Werror=unused-variable]
  Move variable declaration inside the
  `#if !CONFIG(LP_PL011_SERIAL_CONSOLE)` block

drivers/udc/dwc2.c:505: [-Werror=format=]
  use `%zd` to match type `size_t`

Change-Id: Id285c24cba790f181fa203f3117e5df35bed27c4
Signed-off-by: Thomas Heijligen <src@posteo.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69764
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-11-21 21:08:30 +00:00
Arthur Heymans ea1e36694d coreboot_tables: Drop uart PCI addr
Only edk2 used this to fill in a different struct but even there the
entries go unused, so removing this struct element from coreboot has
no side effects.

Change-Id: Iadd2678c4e01d30471eac43017392d256adda341
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68767
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2022-10-26 14:12:06 +00:00
Jakub Czapiga a0e36d8cba tests: Add support for tests build failures detection
This patch introduces new target: junit.xml-unit-tests, which builds and
runs unit-tests. It also creates build log containing build logs. This
feature allows for one to see build failures in Jenkins dashboard.

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I94184379dcc2ac10f1a47f4a9d205cacbeb640fe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67372
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-09-21 14:06:42 +00:00
Julius Werner d96ca24652 cbfs/vboot: Adapt to new vb2_digest API
CL:3825558 changes all vb2_digest and vb2_hash functions to take a new
hwcrypto_allowed argument, to potentially let them try to call the
vb2ex_hwcrypto API for hash calculation. This change will open hardware
crypto acceleration up to all hash calculations in coreboot (most
notably CBFS verification). As part of this change, the
vb2_digest_buffer() function has been removed, so replace existing
instances in coreboot with the newer vb2_hash_calculate() API.

Due to the circular dependency of these changes with vboot, this patch
also needs to update the vboot submodule:

Updating from commit id 18cb85b5:
    2load_kernel.c: Expose load kernel as vb2_api

to commit id b827ddb9:
    tests: Ensure auxfw sync runs after EC sync

This brings in 15 new commits.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I287d8dac3c49ad7ea3e18a015874ce8d610ec67e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66561
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
2022-09-02 23:51:29 +00:00
Hsin-Te Yuan cb28d649ea x86/cache.c: Implement dcache_*
A new ChromeOS automated test will be introduced to check the cbmem log
of diagnostic boot mode. Because the diagnostic boot does not allow
booting into kernel, the test must perform AP reset and then check the
cbmem log afterwards. However, the memory content might not be written
back to memory (from CPU cache) during AP reset because of the cache
snooping mechanism on x86. Hence, some API to flush cache is needed.

Implement dcache_* to allow flushing cache proactively in x86. To avoid
unnecessary flush, check dma_coherent before calling dcache_* functions,
which will be always true in x86. Therefore, this change won't affect
the original functionality.

BUG=b:190026346
TEST=FW_NAME=primus emerge-brya libpayload

Cq-Depend: chromium:3841252
Signed-off-by: Hsin-Te Yuan <yuanhsinte@google.com>
Change-Id: I622d8b1cc652cbe477954a900885d12e6494d94d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66578
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-09-01 14:21:11 +00:00
Yu-Ping Wu 30d8e724e7 libpayload: Add const for dma_coherent argument
Add the const modifier for the ptr argument of dma_coherent to avoid
unnecessary type casting in payloads.

BUG=none
TEST=emerge-corsola libpayload
BRANCH=none

Change-Id: Ic4bb1d8318c7e83fd3ab3054aa0333cb27afe588
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66961
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Hsin-Te Yuan <yuanhsinte@google.com>
2022-08-24 21:27:46 +00:00
Yidi Lin 5ef258b3f6 libpayload: usb: Fix spacing issues
Found by:
find payloads/libpayload/drivers/usb -type f -name "*.[ch]" | xargs \
util/lint/checkpatch.pl --types SPACING -q --fix-inplace -f

Change-Id: Id23e2e573e475c6d795812a4b2df9aeffbcaaaf4
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66596
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-12 17:17:53 +00:00
Yidi Lin 8610dd5022 libpayload: usbmsc: Prevent usbdisk_remove() from being called twice
When removing SD card from USB card reader, the USB MSC stack does
not detach the device immediately. Instead, the USB MSC stack calls
usbdisk_remove() and calls usb_msc_destroy() after several pollings.
It results in usbdisk_remove() being called twice.

Since the usbmsc_inst_t instance is freed after first usbdisk_remove()
call, the second call invokes an invalid usbmsc_inst_t instance and
causes exception in CPU.

This patch prevents usbdisk_remove() from being called twice by setting
usbdisk_created to zero.

BUG=b:239492347
TEST=insert an empty SD card into the USB card reader then remove
     the SD card. AP firmware does not crash.

Change-Id: I0675e9fde3e770d63dd0047928356a204245ef18
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66449
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-12 17:14:54 +00:00
Veerabhadrarao Badiganti 7a0440afc6 libpayload: Enable PCIe driver for sc7280
Enable PCIe driver for herobrine board.

BUG=b:182963902,b:216686574,b:181098581
TEST=Verified on Qualcomm sc7280 development board with NVMe card
(Koixa NVMe, Model-KBG40ZPZ256G with FW AEGA0102). Confirmed NVMe is
getting detected in response to 'storage init' command in depthcharge
CLI prompt.

Output logs:
  ->dpch: storage init
    Initializing NVMe controller 1e0f:0001
    Identified NVMe model KBG40ZPZ256G TOSHIBA MEMORY
    Added NVMe drive "NVMe Namespace 1" lbasize:512, count:0x1dcf32b0
    *  0: NVMe Namespace 1
    1 devices total

Also verified NVMe boot path, that is depthcharge is able to load the
kernel image from NVMe storage.

Change-Id: Idb693ca219ba1e5dfc8aec34027085b53af49a2c
Signed-off-by: Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65661
Reviewed-by: Shelley Chen <shchen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-01 18:04:54 +00:00
Prasad Malisetty 857d3781e2 libpayload/pci: Add pci_map_bus function for Qualcomm platform
Add 'pci_map_bus' function and PCIE_QCOM config for Qualcomm platform.

BUG=b:182963902,b:216686574,b:181098581
TEST=Verified on Qualcomm sc7280 development board with NVMe endpoint
(Koixa NVMe, Model-KBG40ZPZ256G with FW AEGA0102). Confirmed NVMe is
getting detected in response to 'storage init' command in depthcharge
CLI prompt.

Output logs:
 ->dpch: storage init
   Initializing NVMe controller 1e0f:0001
   Identified NVMe model KBG40ZPZ256G TOSHIBA MEMORY
   Added NVMe drive "NVMe Namespace 1" lbasize:512, count:0x1dcf32b0
  *  0: NVMe Namespace 1
    1 devices total

Also verified NVMe boot path that is depthcharge is able to load the
kernel image from NVMe storage.

Change-Id: I7d1217502cbd7d4d0cdd298919ae82435630d61c
Signed-off-by: Prasad Malisetty <quic_pmaliset@quicinc.com>
Signed-off-by: Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57615
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-01 18:04:54 +00:00
Jon Murphy c4e90454f4 treewide: Unify Google branding
Branding changes to unify and update Chrome OS to ChromeOS (removing the
space).

This CL also includes changing Chromium OS to ChromiumOS as well.

BUG=None
TEST=N/A

Change-Id: I39af9f1069b62747dbfeebdd62d85fabfa655dcd
Signed-off-by: Jon Murphy <jpmurphy@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65479
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-07-04 14:02:26 +00:00
Nicholas Chin cc8be37a59 libpayload/Makefile.inc: Initialize vboot submodule
After commit 63e54275f6 (libpayload: Implement new CBFS access API),
libpayload includes headers from commonlib/bsd, which in turn include
vb2_sha.h from vboot after commit 0655f78041 (commonlib/bsd: Add new
CBFS core implementation). Usually submodules are initialized by the top
level Makefile.inc, but since this file is never read when building
libpayload based payloads outside the main coreboot build, the header
cannot be found unless the vboot submodule had previously been
initialized. This is especially evident when following Tutorial 1 in the
documentation, where the coreboot repo is cloned without recursing into
submodules and coreinfo is built separately from the coreboot build
using `make -C payloads/coreinfo`.

TEST=Deinitialize submodules and run `make -C payloads/coreinfo`.
Coreinfo should build without error.

Change-Id: I29b16525999921fbce51c2459d3d534b64e00b3c
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65222
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-06-20 13:54:31 +00:00
Yu-Ping Wu c1d7d89d48 libpayload/libcbfs: Fix file hash check
Fix the buffer pointer passed to cbfs_file_hash_mismatch().

Add a test case with LZ4 compression, which would catch the bug we are
fixing.

Change-Id: I36605e2dbc0423fa6743087512f2042b37c49d35
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65149
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-06-16 18:02:34 +00:00
Nico Huber e1e762716c libpayload/Makefile.payload: Fix CFLAGS
GCC_CFLAGS_<arch> contains only the flags that are GCC specific, iow.
flags that don't work with Clang.

CFLAGS_<arch>, OTOH, contains all flags that should be used and auto-
matically includes GCC_CFLAGS_<arch> if GCC is selected.

Change-Id: I5ec15f169d51c7a32ca86e54a98a2ce0e3b51e6d
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62248
Reviewed-by: Thomas Heijligen <src@posteo.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-06-15 18:06:39 +00:00
Nico Huber 27c1da6c26 libpayload/Makefile.payload: Include libpayload's .config
It's required to tell xcompile what compiler to use.

Change-Id: I9f1ddef96a20df1d83bfd4883b2e006ba78ce7c4
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62269
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
2022-06-15 18:06:23 +00:00
Nico Huber 543c79224c libpayload/Makefile.payload: Revise config strategy
Payloads often just use one of the defconfigs for libpayload. When
the `Makefile.payload` was introduced, it also added dependencies
to pass a `make oldconfig` or `make defconfig` for the payload on
to libpayload. Turned out, this creates some dependency madness
when, for instance, `make oldconfig` gets called without a libpay-
load `.config` available, or when we try to include the `.config`
in the `Makefile`.

To make things worse, Kconfig's `Makefile` that is imported from
Linux contains some rarely used paths that are generally incompa-
tible to our environment. So let's get rid of the hard-to-control
automatism.

Payloads that don't want to use a libpayload defconfig need to
clear the `$(LIBPAYLOAD_DEFCONFIG)` variable and manually run
the respective config target to generate a `.config`. To fully
support this, the rule to create a `.config` via `defconfig` is
guarded by `$(LIBPAYLOAD_DEFCONFIG)`. Otherwise we'd have a
spurious, broken recipe when the variable is unset.

We keep the option to call libpayload targets with an `lp-` prefix
for convenience. The existing, explicit targets `lp-defconfig` and
`lp-oldconfig` are replaced with a pattern match, so all config
and other targets should work.

Change-Id: Ie3fcce58d98e248c7182cd47f2a797fe066dd18a
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62273
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
2022-06-15 18:06:05 +00:00
Hsuan Ting Chen 607b39c593 libpayload: Add commonlib/bsd/elog and its dependency
Add commonlib/bsd/elog dependency in libpayload. This will allow other
payloads (e.g. depthcharge) to implement their own eventlog read and
write utilities.

Also include commonlib/bsd/elog.c source to libc-srcs. This ensure
payloads could utilize commonlib elog helper functions.

Change-Id: I64d0fdd2a8eff1d89a1ac451d37b61787b5564e7
Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63115
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-06-09 13:33:35 +00:00
Julius Werner 23d2465720 commonlib: Clean up compiler.h
This patch contains several minor cleanups related to compiler.h:

- Replace __always_unused() (which is a Linux-specific concept that
  doesn't make sense without also having __maybe_unused(), and had zero
  uses in the codebase) with __unused() which moves here from helpers.h

- Add __underscores__ to the names of all attributes in the compiler
  attribute shorthand macros. This is necessary to make them work in
  files where the same name was already used for an identifier (e.g.
  cbfstool/cbfs.h's `unused` array of file types).

- Remove libpayload's own copy of compiler.h and make it directly pull
  in the commonlib/bsd copy.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I9644da594bb69133843c6b7f12ce50b2e45fd24b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64737
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2022-06-07 12:34:35 +00:00
Jianjun Wang 20a87c0bed libpayload/pci: Add pci_map_bus function for MediaTek platform
Add 'pci_map_bus' function and PCIE_MEDIATEK config for MediaTek
platform.

TEST=Build pass and boot up to kernel successfully via SSD on Dojo
board, here is the SSD information in boot log:
 == NVME IDENTIFY CONTROLLER DATA ==
    PCI VID   : 0x15b7
    PCI SSVID : 0x15b7
    SN        : 21517J440114
    MN        : WDC PC SN530 SDBPTPZ-256G-1006
    RAB       : 0x4
    AERL      : 0x7
    SQES      : 0x66
    CQES      : 0x44
    NN        : 0x1
Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006

BUG=b:178565024
BRANCH=cherry

Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: I9ea7d111fed6b816fa2352fe93c268116519a577
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56794
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2022-05-20 02:53:35 +00:00
Jianjun Wang 2ad74deb2a libpayload/pci: Add support for bus mapping
Move the common APIs to pci_ops.c and IO based operations to
pci_io_ops.c, and add pci_map_bus_ops.c to support bus mapping.

TEST=Build pass and boot up to kernel successfully via SSD on Dojo
board, here is the SSD information in boot log:
 == NVME IDENTIFY CONTROLLER DATA ==
    PCI VID   : 0x15b7
    PCI SSVID : 0x15b7
    SN        : 21517J440114
    MN        : WDC PC SN530 SDBPTPZ-256G-1006
    RAB       : 0x4
    AERL      : 0x7
    SQES      : 0x66
    CQES      : 0x44
    NN        : 0x1
Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006

BUG=b:178565024
BRANCH=cherry

Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: Ie74801bd4f3de51cbb574e86cd9bb09931152554
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56789
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2022-05-20 02:51:33 +00:00
Jianjun Wang d16c2aa6de coreboot_tables: Add PCIe info to coreboot table
Add 'lb_fill_pcie' function to pass PCIe information from coreboot to
libpayload, and add CB_ERR_NOT_IMPLEMENTED to the cb_err enum for the
__weak function.

ARM platform usually does not have common address for PCIe to access the
configuration space of devices. Therefore, new API is added to pass the
base address of PCIe controller for payloads to access PCIe devices.

TEST=Build pass and boot up to kernel successfully via SSD on Dojo
board, here is the SSD information in boot log:
 == NVME IDENTIFY CONTROLLER DATA ==
    PCI VID   : 0x15b7
    PCI SSVID : 0x15b7
    SN        : 21517J440114
    MN        : WDC PC SN530 SDBPTPZ-256G-1006
    RAB       : 0x4
    AERL      : 0x7
    SQES      : 0x66
    CQES      : 0x44
    NN        : 0x1
Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006

BUG=b:178565024
BRANCH=cherry

Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: I6cdce21efc66aa441ec077e6fc1d5d1c6a9aafb0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63251
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Shelley Chen <shchen@google.com>
2022-05-19 16:34:55 +00:00
David Hendricks 7d0e5fa3ff libpayload: Fix guards in include/{arm,arm64,x86}/arch/barrier.h
Change-Id: Ib4897c4f5837f7f3173d5062eecb893adbe36964
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64365
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-05-16 06:55:06 +00:00
Nico Huber 8ddecd8538 libpayload/nvme: Fix controller disablement in (de)init sequence
We wrote to the wrong register. The EN bit is in the CC (Controller
Configuration) register at 0x14.

Fixes re-initialization in QEMU and on siemens/chili during a second
FILO run.

Change-Id: I125de55d7f1a7c9f070437190c5a08a288b274f8
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63935
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-05-11 12:19:03 +00:00
Nico Huber 88b041897f libpayload/nvme: Test for NVMe-command-set bit individually
We only need to know if the NVMe command set is supported. Other
command-set bits can be set too, but we don't have to care.

Fixes init in QEMU which has more command-set bits set by now.

Change-Id: I29a693cf8cc13775e94dc671e8d0412ad86fef9c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63934
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-05-11 12:15:11 +00:00
Nico Huber 2b986700c9 libpayload/nvme: Fix error paths of nvme_init()
We mustn't try to release resources that we haven't acquired yet. Also,
sending commands to the NVMe device is futile if we already timed out.

Fixes hangs after a failed init noticed in QEMU and on siemens/chili.

Change-Id: Ib83c7785d6e0dc3c44fbd50a30694c74932750d6
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63933
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-05-11 12:14:20 +00:00
Jianjun Wang b2537bdad5 coreboot_tables: Replace 'struct lb_uint64' with lb_uint64_t
Replace 'struct lb_uint64' with 'typedef __aligned(4) uint64_t
lb_uint64_t', and remove unpack_lb64/pack_lb64 functions since it's no
longer needed.

Also replace 'struct cbuint64' with 'cb_uint64_t' and remove
'cb_unpack64' in libpayload for compatible with lb_uint64_t.

Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: If6b037e4403a8000625f4a5fb8d20311fe76200a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-04-14 22:27:50 +00:00
Jakub Czapiga 9760264a96 commonlib/bsd/helpers: Remove redundancy with libpayload defines
Move STRINGIFY() from coreboot string.h to commonlib/bsd/helpers.h
Remove redundant defines from libpayload.h and libpayloads' standard
headers.

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I3263b2aa7657759207bf6ffda750d839e741f99c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-03-30 21:21:47 +00:00
Arthur Heymans cddba4528d libpayload: Parse the ACPI RSDP table entry
Change-Id: I583cda63c3f0b58f8d198ed5ecea7c4619c7a897
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62576
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-03-30 00:03:28 +00:00
Jakub Czapiga 3068d562ae libpayload/vboot: Fix include paths fixup macro
Include paths fixup macro for vboot was broken and was adding
unnecessary prefix to paths from $(coreboottop). This patch adds correct
filters to fix this behavior.

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I264e715fa879a4e56b6e5f5423916298e8780a2b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63002
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-03-25 19:25:36 +00:00
Ravi Kumar Bokka 42fcb2a8f4 libpayload: Parse DDR Information using coreboot tables
BUG=b:182963902,b:177917361
TEST=Validated on qualcomm sc7280 development board

Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org>
Change-Id: Ieca7e9fc0e1a018fcb2e9315aebee088edac858e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59193
Reviewed-by: Shelley Chen <shchen@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-16 01:21:44 +00:00
Julius Werner 69cc557cfb commonlib/bsd: Remove cb_err_t
cb_err_t was meant to be used in place of `enum cb_err` in all
situations, but the choice to use a typedef here seems to be
controversial. We should not be arbitrarily using two different
identifiers for the same thing across the codebase, so since there are
no use cases for serializing enum cb_err at the moment (which would be
the primary reason to typedef a fixed-width integer instead), remove
cb_err_t again for now.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Iaec36210d129db26d51f0a105d3de070c03b686b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62600
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-03-09 02:18:21 +00:00
Julius Werner 2c423441c0 libpayload: cbmem_console: Drop loglevel markers from snapshot
coreboot recently introduced non-printable loglevel markers in the CBMEM
console. Payloads were generally unaffected since they don't use log
levels and it is still legal to append lines without a marker to the
log. However, payloads using cbmem_console_snapshot() to display
existing logs from coreboot have started seeing '?' characters in place
of the markers. This patch fixes the issue by filtering out marker
characters.

BUG=b:221909874

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I4a9e5d464508320cf43ea572d62896d38c2a128d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62506
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-03-04 16:04:10 +00:00
Jakub Czapiga 49fff57a09 libpayload/bin/lpgcc: Make lpgcc provide TPM configuration for vboot
TPM1_MODE and TPM2_MODE defines have to be added to vboot and payload
cflags to make them build correctly without requiring payloads to provide
defines.

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I567a9f04d7089699840dc7e0a063cf3030fb934b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62516
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-03-03 22:38:59 +00:00
Nico Huber 47722cfe55 libpayload/lpgcc: Add `--gc-sections` linker argument
To be able to link libcbfs without vboot, we need garbage
collection now.

Change-Id: Id9a9fe7efb9fb4409a43ae8357f4f683618805d2
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62247
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-23 22:47:24 +00:00
Nico Huber 4fa9f2ae8b libpayload/x86: Fix boot_device_read() and hook it up
Casts from integer to pointer are usually a case for phys_to_virt().

Change-Id: I861d435ff2361cdc26a2abd46d43b9346fa67ccc
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62246
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-23 22:47:09 +00:00
Jakub Czapiga 0ac5ed4490 libpayload/vboot: Enable vboot and x86 SHA extension for ChromeOS
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ia63d44de5440b87cedb35ff92edaa0f35ccd75a4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62122
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-21 15:18:55 +00:00
Jakub Czapiga b17f1cebcb libpayload/vboot: Add missing quotes enclosing values
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I1a72ea63a46dedd1fc2e1e53bf7714ad70ebc5e1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-21 15:18:38 +00:00
Jakub Czapiga 7f663ab3e6 libpayload/vboot/Makefile.inc: Add strip to kconfig-to-binary macro
Lack of strip made it required to pass arguments to the
kconfig-to-binary macro without spaces. Strip fixed invalid behavior of
this macro.

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I9889b45f773b9675fae287086d324c180c505a4b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62133
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-21 15:18:24 +00:00
Jakub Czapiga e904d9ad67 libpayload/cbfs: Add missing new line at the end of error messages
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ieec281e4f1c67e40976892b3dd1780d2f3802df4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62125
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-21 15:15:37 +00:00