For devices supporting both Linux and Windows, we may find some ACPI
devices that only need drivers in Linux and should not even be shown in
Windows Device Manager UI.
The new 'hidden' keyword in device tree 'device' statement allows
devices sharing same driver to call acpi_gen_writeSTA with different
values.
BUG=b:72200466
BRANCH=eve
TEST=Builds and boots properly on device eve
Change-Id: Iae881a294b122d3a581b456285d2992ab637fb8e
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/28566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
"ops" field was used in device structure only to add
default_dev_ops_root for root device. It was always set to NULL for
all other devices. This change gets rid of ops field from struct
device and instead hardcodes default_dev_ops_root in pass1 for root
device.
BUG=b:80081934
TEST=Verified that static.c generated with and without this change is
exactly the same.
Change-Id: I0848788610c2ed27274daf4920de3068a9784d4c
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/27209
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This change adds support to allow variants to override the devices and
properties in base device tree by providing an override device
tree. It works as follows:
1. Both base and override device trees are parsed from provided input
files.
2. Walk through the trees in lockstep fashion using depth-first
traversal checking if a node in override tree has a matching node in
base tree.
- If matching node is found, then update the properties of base node
using the override node. Continue walking the children of the nodes.
- If matching node is not found, then copy the entire override
subtree of the node under the current base parent. In addition to
that, chip instance pointers of the nodes in override tree need to be
updated if they were pointing to the override parents chip instance.
Since chip always expects a device to be present, it leads to a
side-effect that overriding chip registers requires that a device is
always provided for the chip in the override tree as well.
BUG=b:80081934
Change-Id: I6604e4f8abe3fc48240e942fea32da96031e1e46
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/27206
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This change gets rid of rescnt member in struct device since it is
redundant. "res" member can be used to determine if resource list is
present or not.
BUG=b:80081934
TEST=Verified that static.c generated with and without this CL is
exactly the same for all boards built using abuild.
Change-Id: I73a2361686ad1130716a7d29576f2d02b9ed33c1
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26806
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This change re-factors the device structure in parse tree to be able
to support multidev devices just like non-multidev devices.
With this change, every device has a bus under it which is the parent
of all devices that fall on the bus. If there are duplicate entries in
the devicetree, then there will be multiple buses under the device and
each bus will have its own set of children.
The tree starts out with a root device which has a root bus under
it. This is a special device which is created statically and its
parent is its own root bus. When parsing the device tree file, devices
get added under the root bus as children.
Since this change re-organizes the way devicetree is represented, it
gets rid of latestchild and next_sibling pointers from struct
device. Also, the tree traversal to generate static.c is changed to
breadth-first walk instead of using the next_sibling.
BUG=b:80081934
TEST=Verified using abuild that all boards compile successfully.
Change-Id: Ic8c8a73a247e8e992ab6b1b2cc3131e06fa2e5a1
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26800
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Now that chips and devices are treated differently and the device tree
actually contains only devices, next and nextdev are exactly the same
for all devices in the tree. This change gets rid of nextdev pointer
and updates all uses of nextdev to next.
BUG=b:80081934
TEST=Verified that static.c generated for all boards built by abuild
is same with and without this change.
Change-Id: Ie50b3d769a78fe0beddba2e5551441b43cb212a2
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26741
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Now that chips and devices are treated differently in sconfig, this
change gets rid of struct header and add_header function which were
responsible for maintaining list of headers that need to be added to
static.c.
Instead, struct chip is re-factored into struct chip and
struct chip_instance, where chip is a list of unique chips required by
the mainboard whereas chip_instance is an instance of the chip. One
chip can have multiple instances dependending upon the devices in the
system. Also, struct device is updated to hold a pointer to chip
instance instead of the chip structure. This unique list of chips is
then used to add appropriate headers to static.c
BUG=b:80081934
TEST=Verified using abuild that all boards compile successfully.
Change-Id: I6fccdf7c361b4f55a831195adcda9b21932755aa
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26739
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
The only reason bus pointer existed in device structure in sconfig was
to allow a node to point to the parent which could be a chip and bus
which is the true parent in device tree hierarchy. Now that chip is no
longer a device, there is no need for separate bus and parent
pointers. This change gets rid of the redundant bus pointer in struct
device in sconfig.
BUG=b:80081934
TEST=Verified that static.c generated for all boards built by abuild
is same with and without this change.
Change-Id: I21f8fe1545a9ed53d66d6d4462df4a5d63023844
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26736
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This change removes call to add_header from parsing functions and
moves it to a local function within main.c. It also adds a new
function emit_headers that is responsible for creating the linked list
for chip headers and emitting those to static.c
BUG=b:80081934
TEST=Verified that static.c for all files compiled using abuild is the
same with and without this change.
Change-Id: I24d526e81323115d3cc927242a4b9e49414afbe0
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26726
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This change adds a new structure "struct chip" to identify elements of
type chip rather than re-using the structure for device. Until now
chip was treated as a device while generating the parse tree and then
device tree postprocessing skipped over all the chip entries in
children and sibling pointers of device nodes.
With this change, the device tree will only contain struct device in
the parsed tree. It helps by avoiding unnecessary pointers to chip
structure as children or next_sibling and then skipping those elements
in post processing. Every device can then hold a pointer to its chip.
When generating static.c, chip structure is emitted before device
structure to ensure that the device structure has chip within its
scope. Externally, the only visible change in static.c should be the
order in which chip/device elements are emitted i.e. previously all
chips under a particular device were emitted to static.c and then the
devices using those chips. Now, all chips are emitted before all the
devices in static.c
BUG=b:80081934
TEST=Verified that abuild is successful for all boards. Also, verified
that static.c generated for eve, kahlee, scarlet, asrock imb_a180 is
unchanged from before in node definitions.
Change-Id: I255092f527c8eecb144385eb681df20e54caf8f5
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/26720
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Change-Id: Idfd1bd8240413026b992ae1382a57bccf9d8ddb5
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16082
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
and re-generate _shipped files
Change-Id: I7a18824d64d3f6212e8566695376bf97e2196ee2
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14733
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
It encourages users from writing to the FSF without giving an address.
Linux also prefers to drop that and their checkpatch.pl (that we
imported) looks out for that.
This is the result of util/scripts/no-fsf-addresses.sh with no further
editing.
Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/11888
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
As per discussion with lawyers[tm], it's not a good idea to
shorten the license header too much - not for legal reasons
but because there are tools that look for them, and giving
them a standard pattern simplifies things.
However, we got confirmation that we don't have to update
every file ever added to coreboot whenever the FSF gets a
new lease, but can drop the address instead.
util/kconfig is excluded because that's imported code that
we may want to synchronize every now and then.
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} +
$ find * -type f
-a \! -name \*.patch \
-a \! -name \*_shipped \
-a \! -name LICENSE_GPL \
-a \! -name LGPL.txt \
-a \! -name COPYING \
-a \! -name DISCLAIMER \
-exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} +
Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/9233
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
Forcing this rule, chip_ops can be added in the static devicetree
regardless of the existence of the chip.h files.
Change-Id: Iec1c23484e85cab3f80a34f2b082088f38ac4de9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1472
Tested-by: build bot (Jenkins)
This patch adds support for autogenerating the MPTABLE from
devicetree.cb. This is done by a write_smp_table() declared
weak in mpspec.c. If the mainboard doesn't provide it's own
function, this generic implementation is called.
Syntax in devicetree.cb:
ioapic_irq <APICID> <INTA|INTB|INTC|INTD> <INTPIN>
The ioapic_irq directive can be used in pci and pci_domain
devices. If there's no directive, the autogen code traverses
the tree back to the pci_domain and stops at the first device
which such a directive, and use that information to generate the
entry according to PCI IRQ routing rules.
Change-Id: I4df5b198e8430f939d477c14c798414e398a2027
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1138
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Allow user to add 'subsystemid <vendor> <device> [inherit]' to devicetree.cb for
PCI and PCI domain devices.
Example:
device pci 00.0 on
subsystemid dead beef
end
If the user wants to have this ID inherited to all subdevices/functions,
he can add 'inherit', like in the following example:
device pci 00.0 on
subsystemid dead beef inherit
end
If the user don't want to inherit a Subsystem for a single device, he can
specify 'subsystemid 0 0' on this particular device.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6420 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
aliased_name was a compatibility hack to match the output of the C rewrite
with the python version's results. It seems that we carried these
useless symbols with us for years, just without any impact good or bad.
By declaring devices static and tightening the screws (-Werror), the
compiler now knows that these declarations are useless - and stops.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stefan.reinauer@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5687 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Instead of accessing them globally, pass them as arguments where necessary.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5524 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Update generated parser files.
Add proper include path for utils.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5523 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Hung-Te Lin