Commit graph

67 commits

Author SHA1 Message Date
Myles Watson
552b327ca3 This patch converts __FUNCTION__ to __func__, since __func__ is standard.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-12 21:30:06 +00:00
Stefan Reinauer
ef6cb094b8 This patch makes the recently added assembler debug optional, as it may
cause problems with certain toolchains. This patch will also safe some hard
disk space for those of us working on laptops or netbooks with always too small
disks.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-20 20:13:01 +00:00
Stefan Reinauer
4ed326be5d This patch from Ralf Grosse Boerger makes debugging more comfortable.
With this patch it's possible to 

- determine the according source code line for each asm statement
  (objdump -dS)
- determine the source code file for each asm statement 
  (objdump -ddl)

This isn't exactly trivial because cache_as_ram_auto.c gets compiled to
assembly and converted by a perl script afterwards.

This patch solves the problem 
- by extending cache_as_ram_auto.inc with debug information and line
  numbers
- by correcting the perl calls (".text" --> "\.text")
- by creating a disassembly with source code and line numbers.
  (ctr0.disasm and
  coreboot.disasm)

There's one minor downside to the patch: A complete abuild run takes up
around 1.6G instead of about 700MB now. But I'm sure this is quite
reasonable for the benefits.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>

Please commit while this is being worked out.
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-28 12:09:17 +00:00
Uwe Hermann
3be4bc88fa Drop a number of duplicated failover.c files (they have the same content
as the global src/arch/i386/lib/failover.c file).

Also, drop a number of dummy failover.c files which are not even used at all.

This is abuild-tested by me.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3649 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-11 16:10:54 +00:00
Marc Jones
2ee5c9e21b Geode platforms that use a LPC Super I/O had the LPC serial IRQ set to all
the possible IRQs generated by the SIO. This included IRQ 7 as the default
parallel port IRQ. This overlapped with the MFGPT driver setting IRQ7 for it's
own use. This fix removes IRQ7 from the serial IRQ list for all the mainboards
that were setting it to prevent the conflict and crash when the MFGPT driver
loads.

Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3329 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-05-16 18:08:54 +00:00
Nikolay Petukhov
9c2255c66c Now coreboot performs IRQ routing for some boards.
You can see this by executing commands like this:
grep -r pci_assign_irqs coreboot/src/*

This basically AMD/LX based boards: pcengines/alix1c,
digitallogic/msm800sev, artecgroup/dbe61, amd/norwich, amd/db800.

Also for AMD/GX1 based boards need a patch
[http://www.pengutronix.de/software/ptxdist/temporary-src/references/geode-5530.patch]
for the right IRQ setup.
AMD/GX1 based boards is: advantech/pcm-5820, asi/mb_5blmp, axus/tc320,
bcom/winnet100, eaglelion/5bcm, iei/nova4899r, iei/juki-511p.

I have two ideas.
1. Delete duplicate code from AMD/LX based boards.
2. Add IRQ routing for AMD/GX1 boards in coreboot.

The pirq.patch for IRQ routing logically consist from of two parts:

First part of pirq.patch independent from type chipsets and assign IRQ for
ever PCI device. It part based on AMD/LX write_pirq_routing_table() function.

Second part of pirq.patch depends of type chipset and set PIRQx lines
in interrupt router. This part supports only CS5530/5536 interrupt routers.

IRQ routing functionality is included through PIRQ_ROUTE in Config.lb.

Tested on iei/juki-511p(cs5530a), iei/pcisa-lx(cs5536) and also on
TeleVideo TC7020, see
http://www.coreboot.org/pipermail/coreboot/2007-December/027973.html.

Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3196 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-29 16:59:27 +00:00
Carl-Daniel Hailfinger
cb5c9fb9e3 Factor out print_conf() from Geode LX mainboard directories. The
following mainboard files had identical Geode LX specific print_conf()
implementations:
mainboard/amd/db800/mainboard.c
mainboard/amd/norwich/mainboard.c
mainboard/digitallogic/msm800sev/mainboard.c
mainboard/pcengines/alix1c/mainboard.c
Move print_conf() to northbridge/amd/lx/northbridge.c where it belongs.

Add a copyright notice to mainboard/digitallogic/msm800sev/mainboard.c.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Marc Jones <marc.jones@amd.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-05 09:21:46 +00:00
Ronald G. Minnich
25a37449c5 This patch fixes the remaining stack protector problem on v2. The DISTRO_CFLAGS were not being
included on the CC line for cache_as_ram_auto.c

Tested on ubuntu, where formerly it failed.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3079 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-26 16:57:03 +00:00
Stefan Reinauer
f8ee1806ac Rename almost all occurences of LinuxBIOS to coreboot.
Due to the automatic nature of this update, I am self-acking. It worked in
abuild.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18 15:08:58 +00:00
Stefan Reinauer
7e61e45402 Please bear with me - another rename checkin. This qualifies as trivial, no
code is changed.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18 10:35:56 +00:00
Ronald G. Minnich
254f47ef98 Correction to irq tables.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-26 21:43:21 +00:00
Uwe Hermann
8b942e75d2 Random minor cosmetical or coding style fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2966 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13 16:24:15 +00:00
Ronald G. Minnich
6503cd9d00 Final set of changes to make Alix1c work.
Fix IRQ tables (Thanks to Marc Jones)

Fix IRQ SLOT #

Comment out ram test in early startup. 

make the debug print in lx/raminit.c a debug print, not emerg print

Set the default console log level to 3, but leave in the possibility of 
running with more info (leave maximum at 11)

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

Acked-by: Marc Jones <marc.jones@amd.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2952 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-07 23:13:43 +00:00
Ronald G. Minnich
9d5c3a8ea4 This patch is a trivial response to a good comment from Uwe, so I am
self-acking before it gets lost.

Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2924 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-01 15:15:14 +00:00
Ronald G. Minnich
65bc460e01 This code gets us to a working linux boot on the alix1c. I have not tested
Ethernet yet. The fixes are a board-specific fake spd_read_byte, cleaning up 
comments, and just in general customizing for the 1c. 

The lxraminit 
change fixes a bug (&& used instead of ||), adds some debug prints which were
VERY useful debugging the alix1c, changes fatal error messages from print_debug
to print_emerg, and adds two functions: 
banner, which just prints out a string with a banner, and 
hcf, which print an emergency message and then pushes null bytes
into the uart forever, just to make sure that no bytes get lost 
for any reason. 


Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2899 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-26 14:57:46 +00:00
Ronald G. Minnich
cbc95f32fb Partial changes and fixup.
Removed reset.c and added copyright headers.
Remove debug.c. It is not used and should not be here.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2766 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09 19:43:31 +00:00
Ronald G. Minnich
6226f13c11 Welcome to PC Engines and the ALIX 1C!
This is a geode LX board. There are timing settings that are not right
yet, we are still trying to get our board to boot Linux :-)

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2765 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-08 18:32:53 +00:00