Commit Graph

19230 Commits

Author SHA1 Message Date
Elyes HAOUAS b4d8257dff mainboard/jetway/j7f2: Use tabs for indents
Change-Id: Id97981a05ce4af371c765c6950ed504557b0a584
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16825
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:35:24 +02:00
Elyes HAOUAS c3d490cc24 mainboard/winent/mb6047: Use tabs for indents
Change-Id: Iaf5ad440cfc2bbe08ea9f6c545e5e314645c8893
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16823
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:35:03 +02:00
Elyes HAOUAS bbcb8bc971 mainboard/kontron/ktqm77: Use tabs for indents
Change-Id: I3040dc9a2534a77087805ee61c4f91d1bdb4d509
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16822
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:34:45 +02:00
Elyes HAOUAS 075ff736f6 mainboard/digitallogic/msm800sev: Use tabs for indents
Change-Id: I39ad6606869f059b2ef0c45d6741b844b3791655
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16821
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:34:28 +02:00
Elyes HAOUAS dae8fe747c mainboard/gigabyte/ga-b75m-d3v: Use tabs for indents
Change-Id: I36011719f79da4a9ab2aaeb92ffb0506b4373143
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16816
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:33:51 +02:00
Elyes HAOUAS cb6b120e93 mainboard/gigabyte/ga-b75m-d3h: Use tabs for indents
Change-Id: I038e5cea654d1760ddb2c403c651d8f75e021251
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16819
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:33:28 +02:00
Elyes HAOUAS cf81bd3002 mainboard/samsung/stumpy: Use tabs for indents
Change-Id: I1ffee53a04df6874f658feb3d6ce7d5c7b922837
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16818
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:33:16 +02:00
Elyes HAOUAS 117fd8d645 mainboard/kontron/986lcd-m: Use tabs for indents
Change-Id: Ibeb0da2f75b4aec32f5238e5634bc1f1d8220b84
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16820
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:32:39 +02:00
Martin Roth 80fa9d899c google/reef: Fix default values in Kconfig
These default values weren't being set with the default
keyword so were ending up with different values.

from the default generated config file before this change:
CONFIG_DRIVER_TPM_I2C_BUS=0x9
CONFIG_DRIVER_TPM_I2C_ADDR=0x2
CONFIG_DRIVER_TPM_I2C_IRQ=-1

Change-Id: I19514d0c9b2a9b7e479f003a4d3384e073f4d531
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16828
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-30 23:57:12 +02:00
Martin Roth 311fb696cf Kconfig: Prefix hex defaults with 0x
Because these variables had "non-hexidecimal" defaults, they
were updated by kconfig when writing defconfig files.

Change-Id: Ic1a070d340708f989157ad18ddc79de7bb92d873
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16827
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-30 23:57:02 +02:00
Elyes HAOUAS 48a0129d97 mainboard/google/stout/romstage.c: Use tabs for indents
Change-Id: I2402648b8c0b9dcc730ce7f099e1e4ccef3b79fc
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16814
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-30 20:27:55 +02:00
Nico Huber bc97b4e37d soc/intel/fsp_broadwell_de/uart: Drop it
A copy of our uart8250io driver sneaked in with Broadwell-DE support.
The only difference is the lack of initialization (due to FSP handling
that).

TEST=manually compared resulting object files

Change-Id: I09be10b76c76c1306ad2c8db8fb07794dde1b0f2
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/16786
Tested-by: build bot (Jenkins)
Reviewed-by: York Yang <york.yang@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-30 18:18:01 +02:00
Arthur Heymans 0b9ecb5831 mb/intel/d945gclf: Allow use of native graphic init
Add PCI device id to native graphic init and add the Native graphic init
option in Kconfig.

Change-Id: I136122daef70547830bcc87f568406be7162461f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/16512
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 17:12:36 +02:00
Arthur Heymans b59bcb2d5f i945/gma.c: add native VGA init
This reuses the Intel Pineview native graphic initialization
to have output on the VGA connector of i945 devices.

The behavior is the same as with the vendor VBIOS BLOB.
It uses the external VGA display if it is connected.

Change-Id: I7eaee87d16df2e5c9ebeaaff01d36ec1aa4ea495
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/16511
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 17:11:54 +02:00
Arthur Heymans 7dfc8a5ebd i945/gma.c: use linux code to calculate divisors
The code to compute n, m1, m2, p1 divisors is not correct in coreboot and
on some targets hits a working mode at lower refresh rate, which is why
display is working on some targets.

The divisors must be such "refclk * (5 * (m1 + 2) + (m2 + 2))/ (n + 2)
/ (p1 * p2)" is as close as possible to the target frequency (which
is defined by the resolution and refresh rate).

This patch also fixes the reference frequency.

This patch reuses linux (4.1) code from drivers/gpu/drm/i915/intel_display.c
to correctly compute divisors.

The result is that some previously not working displays, like many
displays found on the Lenovo T60 might work now.
Some examples of T60 displays that were known to not work (in payload):
Samsung LTN141XA-L01 (14.1" 1024x768)
LG-Philips LP150X09 (15.1" 1024x768)
IDtech N150U3-L01 (15.1" 1600x1200)
IDtech IAQX10N (15.1" 2048x1536)
Samsung LTN154X3-L0A (15.4" 1280x800)
LG-Philips LP150E06-A5K4 (15.1" 1400x1050)

Tested on T60 with 1024x786.

Change-Id: I2c7f3bb0024ac005029eaebe3ecdc70c38ac777e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/16504
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 17:11:40 +02:00
Vadim Bendebury 494d398ae4 vboot: clear tpm when required
Function which invoked when TPM clear is requested was left empty,
this patch fixes it.

BRANCH=gru
BUG=chrome-os-partner:57411
TEST=verified on a chromeos device that tpm is in fact cleared when
     CLEAR_TPM_OWNER_REQUEST is set by userland.

Change-Id: I4370792afd512309ecf7f4961ed4d44a04a3e2aa
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://review.coreboot.org/16805
Tested-by: build bot (Jenkins)
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
2016-09-30 03:08:22 +02:00
Lee Leahy d677d9cedd Documentation/Intel/Soc: Update Quark FSP build instructions
Update the FSP build instructions for Quark:
* Discuss multiple types

BRANCH=none
BUG=None
TEST=Build Quark FSP using new instructions

Change-Id: Ibc4bfe32d0eb3877d3b988bc185c73be58d44878
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16826
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 01:18:04 +02:00
Lee Leahy 31f5c130b1 mainboard/intel/galileo: Make FSP 2.0 the default
Switch from FSP 1.1 to FSP 2.0 as the default build.

BRANCH=none
BUG=None
TEST=Build and run on Galileo Gen2

Change-Id: Icbb3a36cdde68baf4d68fbfc371f8847c56e1162
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16810
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 01:17:41 +02:00
Lee Leahy 5a9ca4d1ec drivers/intel/fsp2_0: Fix debug display support
Fix errors in debug display support.

BRANCH=none
BUG=None
TEST=Build FSP 2.0 (SEC/PEI core with all FSP debug on) and run on
Galileo Gen2

Change-Id: I2ece056d66dc8568a7b7206970f20368ec5bf147
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16809
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 01:17:20 +02:00
Lee Leahy 44ec92a48d soc/intel/quark: Fix FSP 2.0 build
Fix the build issues with FSP 2.0:
* Remove struct from the various data structures.
* Properly display the serial port UPDs.
* Change chipset_handle_reset parameter type

BRANCH=none
BUG=None
TEST=Build FSP 2.0 (SEC/PEI core with all FSP debug off) and run on
Galileo Gen2

Change-Id: Icae578855006f18e7e5aa18d2fd196d300d0c658
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16808
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 01:16:51 +02:00
Lee Leahy 54f857b29e soc/intel/quark: Support multiple version of FSP
Add support for multiple versions of FSP.

BRANCH=none
BUG=None
TEST=Build FSP 1.1 (SEC/PEI core, with all FSP debug off) and run on
Galileo Gen2

Change-Id: Ie7e7f0f883c4d3bfcb18fa25571e505cdde00b2d
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16807
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 01:16:25 +02:00
Lee Leahy e1654235fd mainboard/intel/quark: Add FSP selection values
Add Kconfig values to select the FSP setup:
* FSP version: 1.1 or 2.0
* Implementation: Subroutine or SEC/PEI core based
* Build type: DEBUG or RELEASE
* Enable all debugging for FSP
* Remove USE_FSP1_1 and USE_FSP2_0

Look for include files in vendorcode/intel/fsp/fsp???/quark

BRANCH=none
BUG=None
TEST=Build FSP 1.1 (subroutine) and run on Galileo Gen2

Change-Id: I3a6cb571021611820263a8cbfe83e69278f50a21
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16806
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 01:15:44 +02:00
Elyes HAOUAS 127b5d1270 mainboard/asus/kfsn4-dre_k8/romstage.c: Use tabs for indents
Change-Id: If6b36ebef49dd2733d272f990bb7c6623d4ab1b1
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16785
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-29 23:52:13 +02:00
Elyes HAOUAS 0c31a677b0 mainboard/via/epia-m850/romstage.c: Remove unnecessary whitespace
Change-Id: Ic5359f794c64a9a67ec9e059af337a65073baff4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16784
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: Martin Roth <martinroth@google.com>
2016-09-29 23:51:48 +02:00
Elyes HAOUAS aabd7203a8 mainboard/lanner/em8510: Use tabs for indents
Change-Id: Ib6191c590144438d7d9d6772d792a83e92d5516a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16783
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-29 23:51:19 +02:00
Elyes HAOUAS 0e505f1bfe mainboard/iwill/dk8_htx: Use tabs for indents
Change-Id: I303270a45171dda88b7661e3797fd3724e3b055f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16782
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-29 23:51:01 +02:00
Elyes HAOUAS 129c26e5ea mainboard/gigabyte/ga_2761gxdk: Use tabs for indents
Change-Id: Ie752fe0a74acd4b79711596e56fc5ebf83884a0d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16779
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-29 19:23:26 +02:00
Yuichi Ito 4951677b16 mainboard/elmex: Add new board pcm205401
pcm205401 is CPU board equipped with T40R of AMD. We used SeaBIOS and
Windows Embedded Standard 7 to test pcm205401.

In comparison to pcm205400, only VGA PCI ID is changed and board
identifier strings in SMBIOS / DMI.

Change-Id: I6c7e90db84f13ffbf9e629f2b92649895a466155
Signed-off-by: Yuichi Ito <yui.corebt@gmail.com>
Reviewed-on: https://review.coreboot.org/15930
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-09-29 15:56:58 +02:00
Yuichi Ito c4ddfe45a8 mainboard/elmex: Add new board pcm205400
pcm205400 is CPU board equipped with T56N of AMD. We used SeaBIOS and
Windows Embedded Standard 7 to test pcm205400. I disable the port5,
6, and 7 of the PCI-e in elmex/pcm205400/PlatformGnbPcieComplex.h.
I disable the audio capabilities at the 236th line of
elmex/pcm205400/platform_cfg.h. Coding style is modified to avoid the
error and warning that occur when I commit.

Change-Id: I77cb76903fe3c1b500a306426f5399936382695b
Signed-off-by: Yuichi Ito <yui.corebt@gmail.com>
Reviewed-on: https://review.coreboot.org/15929
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-09-29 15:56:39 +02:00
Yuichi Ito b31c3d1b92 src/mainboard: Add vendor ELMEX with a board
Add board with amd/persimmon as template.

Change-Id: I263b54e0f49b6f1ba730c7f87de41f990ba8fe67
Signed-off-by: Yuichi Ito <yui.corebt@gmail.com>
Reviewed-on: https://review.coreboot.org/15926
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-09-29 15:55:15 +02:00
Ronald G. Minnich fa74e4705d cbfstool: set init_size for linux payloads.
We were not setting the init_size for linux payloads.
A proper value of init_size is required if the kernel
is x86_64.

This is tested in qemu and fixes the observed problem
that 974f221c84b05b1dc2f5ea50dc16d2a9d1e95eda and later would not
boot, and would in fact fail in head_64.S.

Change-Id: I254c13d16b1e014a6f1d4fd7c39b1cfe005cd9b0
Signed-off-by: Ronald G. Minnich <rminnich@google.com>
Reviewed-on: https://review.coreboot.org/16781
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2016-09-28 23:05:00 +02:00
Duncan Laurie 6d16e1ff87 google/reef: Mark touchpad and touchscreen as probed devices
Add the 'probed' flag to the touchpad and touchscreen devices so they
are probed by the kernel before being loaded, in case they do not exist
or are replaced with another vendor.

BUG=chrome-os-partner:57686

Change-Id: I0a61964e6874cd99fab0c21fa404a43548fc8ab5
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/16743
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-28 22:17:57 +02:00
Duncan Laurie fbf2c79b48 drivers/i2c/generic: Add config for marking device as probed
Add a config option to the generic I2C device driver to indicate to
the OS that this device should be probed before being added.

This can be used to provide ACPI device instantiations to devices that
may not actually exist on the board.  For example, if multiple trackpad
vendors are supported on the same board they can both be described in
ACPI and the OS will probe the address and load the driver only if the
device responds to the probe at that address.

BUG=chrome-os-partner:57686

Change-Id: I22cffb4b15f25d97dfd37dc58bca315f57bafc59
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/16742
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-28 22:17:43 +02:00
Elyes HAOUAS eeabb75e8c mainboard/amd/rumba: Use tabs for indents
Change-Id: I005e607faa2a6c527584ba9cdcad92f4517a15e6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16778
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-28 22:15:40 +02:00
Elyes HAOUAS 39aa6309ba mainboard/supermicro/h8dmr/romstage.c: Use tabs for indents
Change-Id: I008ccc5fa9d96e52ee59a4562d81e4f7c1d1a6ac
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16775
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-28 22:15:04 +02:00
Elyes HAOUAS 6da74da345 mainboard/sunw/ultra40/romstage.c: Use tabs for indents
Change-Id: I9b7be74625dfcb6317a1cdb61d0dc77d7f359462
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16776
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-28 22:13:58 +02:00
Elyes HAOUAS 8f372d031b mainboard/technexion/tim5690: Use tabs for indents
Change-Id: Icd1f145b3575c6d95dacceb9c0426fbdedcdd686
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16777
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-28 22:11:54 +02:00
Elyes HAOUAS c6317e0c95 mainboard/supermicro/h8qme_fam10/romstage.c: Use tabs for indents
Change-Id: I6ca564294ff3d8eaeae21c0e2c008401aa3f32ff
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16774
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-28 22:09:32 +02:00
Elyes HAOUAS 497b5fe87a mainboard/asus/dsbf/romstage.c: Use tabs for indents
Change-Id: I74d4ef76b8166c8567b1b855c6bc963b4312df77
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16773
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2016-09-28 22:09:06 +02:00
Elyes HAOUAS 499ccbe41c mainboard/intel/emeraldlake2/gpio.c: Use tabs for indents
Change-Id: I369c2063a5e57d1fd33d3c6bf7c715c22970fc32
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16772
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-28 22:08:24 +02:00
Elyes HAOUAS 1a657e9334 mainboard/intel/eagleheights/debug.c: Use tabs for indents
Change-Id: I4d2d876d48e018c247e7f365f7c237a4d8ced332
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16771
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-28 22:07:59 +02:00
Elyes HAOUAS d9ceae5f20 mainboard/broadcom/blast: Use tabs for indents
Change-Id: I61bef70ec572c12518cd3763a6a860e56bfdb716
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16745
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-28 22:07:19 +02:00
Lijian Zhao 28821dbb22 soc/intel/apollolake: Add pmc_ipc device support
A dedicated pmc_ipc DSDT entry is required for pmc_ipc kernel driver.
The ACPI mode entry includes resources for PMC_IPC1, SRAM, ACPI IO and
Punit Mailbox.

BRANCH=None
BUG=chrome-os-partner:57364
TEST=Boot up into OS successfully and check with dmesg to see the
driver has been loaded successfully without errors.

Change-Id: I3f60999ab90962c4ea0a444812e4a7dcce1da5b6
Signed-off-by: Zhao, Lijian <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/16649
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-28 22:01:01 +02:00
Lijian Zhao 9108680c1c soc/intel/apollolake: Use fixed resource for SRAM and IPC1
Intel telemetry support will require PMC IPC1 and SRAM devices to be
operated in ACPI mode. Then using fixed resources on BAR0, BAR1
and BAR2 (PMC only) for those two devices will help
the resource assignment in DSDT stage.

BUG=chrome-os-partner:57364
BRANCH=None
TEST=Boot up into Chrome OS successfully and check with dmesg to see
the driver has been loaded successfully without errors.

Change-Id: I8f0983a90728b9148a124ae3443ec29cd7b344ce
Signed-off-by: Zhao, Lijian <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/16648
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-28 21:56:26 +02:00
Matt DeVillier f9c41974cd northbridge/sandybridge/raminit_mrc.c: fix missing include
Compilation (w/o native raminit) fails due to missing include

Change-Id: Ic79a77006257b32e0181c88c4e24d7c1f5c5f7ce
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/16735
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-27 20:31:55 +02:00
Elyes HAOUAS a6b863a2bc mainboard/msi/ms9185/resourcemap.c: Use tabs for indents
Change-Id: I30b5830442da65ae3ddd35e8bca67795c34e9020
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16737
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-27 20:31:18 +02:00
Elyes HAOUAS 99a92ac722 mainboard/msi/ms9185/romstage: Use tabs for indents
Change-Id: I101462105da31654032ac7e6abd3f9423ad7a7ef
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16736
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-27 20:30:46 +02:00
Duncan Laurie 02fdb3e014 x86: acpi: Use GOOG ID for coreboot table
Use the GOOG ACPI ID until there is an official ID allocation
for coreboot.  Since I administer this range I allocated
0xCB00-0xCBFF for coreboot use.

Change-Id: I38ac0a0267e21f7282c89ef19e8bb72339f13846
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/16724
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-27 16:39:30 +02:00
Elyes HAOUAS bf97ca42cd mainboard/msi/ms9185/mb_sysconf.h: Use tabs for indents
Change-Id: Ib2ab95b26c3bb1cbd58aafb1fafd1b285d6a5ba8
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16738
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-27 16:37:37 +02:00
Arthur Heymans 333176e5d3 i945/gma.c: Generate fake VBT
This generates a fake VBT for the Intel i945 graphic device. i945
supports both the mobile chipset 945gm (calistoga) and the desktop
chipset 945gc (lakeport), which is why a VBT with a different id string
needs to be created for each target.

The VBT id string is obtained from the vbios blob in the following way:
"strings vbios.bin | grep VBT".

Change-Id: I8245b12b16a4426efbe1f584d4163fc257231a98
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/16530
Tested-by: build bot (Jenkins)
Reviewed-by: Damien Zammit <damien@zamaudio.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2016-09-27 15:46:11 +02:00