Commit Graph

3606 Commits

Author SHA1 Message Date
Felix Singer f98dc48386 inteltool: Add GPIO support for Skylake-H chipsets
PCH IDs:
  - H170, Z170, Q170, Q150, C232, QM170, HM170

Used documents:
  - Intel 332690-005EN

Change-Id: I33bf67c0c9d8a5a079fcc78f24a43bc421b2910c
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34618
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-07-31 18:06:07 +00:00
Patrick Georgi fa781fa52c util/release/genrelnotes: Emit more markdown-ish output
It's better to format lists with bullet points.

Change-Id: I503ef2dea9146d67c220236b8a5b64c2ba2d794f
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34504
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-31 08:47:24 +00:00
Patrick Georgi b11a342703 util/release: Make sure intel-microcode ends up in the blobs tarball
Change-Id: Ib41c196cf543070e237d240cf31e019c9b2bf339
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34503
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-31 08:47:21 +00:00
Pavel Sayekat 9429b70f91 util/inteltool: Add H110 GPIO support
Change-Id: I0ce22da3d201c2443bb5a7fcfd779c2c6ee71577
Signed-off-by: Pavel Sayekat <pavelsayekat@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34602
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-29 18:06:13 +00:00
Marshall Dawson b85ddc5d44 util/amdfwtool: Correct fletcher32 algorithm
Change the fletcher32 checksum calculation to match PSP and AGESA
implementations.

The symptom of the failure has only been noted in Picasso's BIOS
Directory Table, when a BIOS binary image of different sizes were
passed to amdfwtool.  The PSP halts the boot process with the bad
BDT checksum, and if allowed to continue, AGESA asserts later due
to a failed BDT verification.

This version has been verified to produce the same result as found
at https://en.wikipedia.org/wiki/Fletcher%27s_checksum.

TEST=Build apu2, bettong, grunt and verify before/after amdfw.rom
     is unchanged.

Change-Id: I2ba2c49a70aa81c15acaab0be6b4c95e7891234f
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34574
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-07-29 05:58:08 +00:00
Martin Roth 57e257d987 util/abuild: Add asserts flag to getopts
We recently added the --asserts option to set asserts as fatal in abuild
but didn't add the flag to getopts, so it gets rejected as an invalid
argument.

Change-Id: Ic70e9a2bec039955cf62c175875598773ade2d3d
Signed-off-by: Martin Roth <martinr@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34597
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-07-28 09:58:20 +00:00
Patrick Georgi 99f0e0c4dc util/testing: Allow adding abuild options to what-jenkins-does
JENKINS_ABUILD_OPT is passed in abuild's command line

Change-Id: I5e7fbb77a3c6592a4414a6c1e3f7556c7e3a824c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34568
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2019-07-26 11:07:01 +00:00
Patrick Georgi 3a0cad30f2 util/abuild: Add --asserts flag
This enables fatal asserts, which can be useful to get better
diagnostics by the build tools (both compilers and static analysis.)

Change-Id: I1e1653f465fe1f545878d6eec83b8645dc17d9cb
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34567
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2019-07-26 11:06:29 +00:00
Patrick Georgi c199973f78 util/testing: Factor out abuild options in what-jenkins-does
The abuild command line can vary a lot depending on options and the line
became unwieldy (plus, it's on two lines because we run abuild twice),
so factor it out into a variable.

Change-Id: I102756fb95c93f542d534610bf9737a13ac1ad62
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2019-07-26 11:06:22 +00:00
Nico Huber 517ed8b0e4 xcompile: Store XGCCPATH
It can be useful to pass along to external projects, e.g. payloads.

Change-Id: I61c7bb162e2737a562cbef08b32ebbafd9cf1cb0
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34555
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-07-25 20:18:52 +00:00
Martin Roth d70f5fae1c crossgcc: Add nasm to toolchain
Tianocore payload uses nasm.  Supply it in the coreboot toolchain
instead of relying on system version.

Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: I086cbe6c46f7c09b2a7a83e177b32fd1bdf99266
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33024
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-25 19:05:22 +00:00
Elyes HAOUAS 1662c0bbfe crossgcc: Upgrade CMake to 3.15.0
Changes: https://cmake.org/cmake/help/v3.15/release/3.15.html

Change-Id: Ic9db9050bec45d33d56ee53e3692276494f306de
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33053
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-25 18:41:23 +00:00
Elyes HAOUAS 43e9bd6b9c crossgcc: Upgrade acpica to version 20190703
Changes: https://acpica.org/node/171

Change-Id: I3883718623e4a23a901a446f738a9e8c988d8433
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34067
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-07-25 18:40:56 +00:00
Elyes HAOUAS 1e9473cc25 crossgcc: Upgrade Expat to version 2.2.7
Change-Id: If3611494228a9228b0b323038ba1e884a1bde10f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33825
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-25 18:33:01 +00:00
Elyes HAOUAS 7e3eab2c13 crossgcc: Upgrade Python to version 3.7.4
Change-Id: I2d4a93fa43cf662685d4c439bcff04e338d51375
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32077
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-25 18:32:39 +00:00
Elyes HAOUAS 31270646ba crossgcc: Upgrade GDB to version 8.3
Change-Id: I7a85ad171fa259e0dcb0019941d735ef41511737
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32754
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-25 18:28:00 +00:00
Jacob Garber 52f0e84ba7 util/*/Makefile: Rename -W to -Wextra
-W is the old name for -Wextra, so let's rename it to be consistent with
the rest of the utility Makefiles.

Change-Id: I0e50f13d2617b785d343707fc895516574164562
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34455
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2019-07-23 09:10:47 +00:00
Jacob Garber 3a82e9b8a3 util/cbfstool/flashmap: Fix memory leaks on failure
Fix several memory leaks on failed printing or tests. These don't matter
much, but it keeps Coverity happy.

Change-Id: Ie750acb50ae1590c3aea533338a8827c03459c1a
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 130245{1,2,3}
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34412
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2019-07-21 18:54:43 +00:00
Patrick Rudolph b30a47b841 sb/intel/{bd82x6x|ibexpeak}: Drop p_cnt_throttling_supported
The processor P_BLK doesn't support throttling. This behaviour could be
emulated with SMM, but instead just update the FADT to indicate no support
for legacy I/O based throttling using P_CNT.

We have _PTC defined in SSDT, which should be used in favour of P_CNT by
ACPI aware OS, so this change has no effect on modern OS.

Drop all occurences of p_cnt_throttling_supported and update autoport
to not generate it any more.

Change-Id: Iaf82518d5114d6de7cef01dca2d3087eea8ff927
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34351
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-07-19 15:06:23 +00:00
Kyösti Mälkki 1557a67c83 device: Move pci_irqs outside DEVTREE_EARLY
Only needed in ramstage, and only for MP tables.

Change-Id: Ia7c1e153b948aeefa4c3bea4920b02a91a417096
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33922
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-17 16:05:28 +00:00
Jacob Garber 198c2e63ac util/inteltool: Shrink buffer size
512 bytes is much too big for this buffer, which only needs to hold a
path that will have a length of at most 20. The large buffer size also
triggers a -Wformat-truncation warning with GCC since it is later
printed into the smaller temp_string array, so shrink it down to
something reasonable.

Change-Id: I6a136d1a739c782b368d5035db9bc25cf5b9599b
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33944
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2019-07-16 16:25:11 +00:00
Martin Roth d3ce8c8442 util/amdfwtool: Add option to build verstage binary into the PSP
For AMD's Family17h processors, verstage needs to be run in the PSP,
before memory is initialized.  This adds that binary into the PSP
directory.

See the Family17h documentation in the coreboot documentation directory
for more information.

BUG=b:137338769
TEST=Build, add test binary to mandolin board, boot

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I29002a1af51c59a2e6c715e15f3dc63e59cd5729
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34324
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2019-07-15 17:47:04 +00:00
Martin Roth ec933135ce util/amdfwtool: Do misc cleanup
- Correct command line argument for microcode patches from -u to -O
- Add #if PSP_COMBO around new_combo_dir() as it's only called when
that's enabled.
- Remove unused variable in integrate_bios_firmwares()
- Correct enum type from amd_fw_type to amd_bios_type in
register_fw_addr()

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I51c6dbe700505bc2e32443000ae55cb644051e42
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34303
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2019-07-15 17:46:46 +00:00
Keith Short 31af70dd96 util/testing: Ensure coreboot-gerrit fails if libpayload build fails
The JUnit output from the libpayload builds was getting deleted by the
coreinfo build.  Move the libpayload to later in the coreboot-gerrit
job.

Also add messages to stdout indicating the various libpayload configs
that are built and a message indicating when all libpayload builds are
complete.

BUG=b:137380189
TEST=Upload test commit that includes a libpayload compile error and
verify buildbot fails.

Change-Id: I43b55f402216582dcf81be34171437be345572ab
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34183
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-13 18:33:51 +00:00
Maxim Polyakov aae7552b24 util/superiotool/aspeed: fix SUART number
Change-Id: I20c4436d414bc6b9a3ff5138d6fd59ead8fd4a47
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34237
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2019-07-12 12:27:45 +00:00
Werner Zeh ac14a40d0e util/sconfig: Fix compile error with older glibc-headers
In patch e29a6ac16a (util/sconfig: Add
commonlib/helpers.h) helpers.h has been added to the include-list.
In headers.h we have a definition for __unused:

On a host system environment where glibc-headers-2.12-1.212 is
installed, a file included by <sys/stat.h> called bits/stat.h have the
following content on line 105 and onwards:

	long int __unused[3];
where the mentioned part is part of the structure called struct stat.

If we include commonlib/helpers.h _before_ <sys/stat.h>, the symbol for
__unused will be defined by the preprocessor to be
'__attribute__((unused))', therefore the above mentioned structure member
will be expanded by the preprocessor to be
'long int __attribute__((unused))[3];', which is not a valid C syntax
and therefore produces a compile error for sconfig tool.

To handle this case we need to make sure commonlib/helpers.h is included
_after_ <sys/stat.h>. As the needed part of stat.h (which is
struct stat) is only used in main.c it is safe to move the include from
sconfig.h directly into main.c while taking care of the order.

Change-Id: I9e6960a318d3dd999e1e9c1df326d67094f3b5ce
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34236
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-07-12 11:02:29 +00:00
Jacob Garber 967f862e47 util/amdfwtool: Close file descriptor on error
Prevents a resource leak.

Change-Id: Id5da2df3e37cba499cd2e9a7c3ede34e4de2ed77
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1402139
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33961
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-07-10 18:21:41 +00:00
Jacob Garber 3dbaf4f336 util/romcc: Correct format specifiers
The right specifier for printing ptrdiff_t is %td.

Change-Id: I7bae4d47f15cfe85ca870f687c6f702339f680bb
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 14021{64,68,76}
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33984
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-07-10 18:21:23 +00:00
Jacob Garber 2e31ea05bb util/cbfstool: Close file on error
Prevents a resource leak.

Change-Id: I032227228c8e37e989960ad6292ded39b81835a9
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1383919
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33992
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-07-10 18:21:00 +00:00
Kyösti Mälkki e29a6ac16a util/sconfig: Add commonlib/helpers.h
Followup work injects ARRAY_SIZE() in static.c

Change-Id: Ifbcaa1b613aef312d3876e8b536499a9f01a8d19
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31932
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-07-10 10:18:13 +00:00
Kyösti Mälkki 5ccce7cdc7 util/sconfig: Declare the repeated devicetree storage
With DEVTREE_EARLY we could create incomplete device
objects with topology links removed to reduce footprint
for bootblock.

Declare everything with 'static __unused DEVTREE_CONST'
to avoid compiler errors and to not expose unusable
device object names to global scope.

Change-Id: Ie4cb9e75f179f44edf4f8256ad8320bc2d4ae71a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31931
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-07-10 10:17:48 +00:00
Nico Huber 45564050ec crossgcc: Fix runtime initialization of a constant
GNAT had a constant initialized at runtime which led to trouble
with compilers that decided to place it into an actual constant
section (e.g. GCC 9). Usually, this would be handled gracefully
if the Ada compiler knew about the runtime initialization. How-
ever, as the initialization was done by taking the address of
the variable, the compiler had no clue.

Change-Id: I73ce4cadc612c814ed2e22b44f429af2ad3db288
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34147
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-09 10:42:08 +00:00
Patrick Rudolph 674bb3bf65 util/superiotool: Add AST2400
Add support for AST2400 Super I/O.

The device doesn't have an ID register, so probe for scratch register
not to read as 0xff.

Tested on platform which has an AST2400.

Change-Id: I86af69c6b2ccefe2c88eef875bc858239df834f1
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32984
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-07-08 16:13:29 +00:00
Jacob Garber 2d58bf6a03 util/cbfstool: Prevent overflow of 16 bit multiplications
Considering the following integer multiplication:

    u64 = u16 * u16

What on earth, one might wonder, is the problem with this? Well, due to
C's unfortunately abstruse integer semantics, both u16's are implicitly
converted to int before the multiplication, which cannot hold
all possible values of a u16 * u16. Even worse, after overflow the
intermediate result will be a negative number, which during the
conversion to a u64 will be sign-extended to a huge integer. Not good.

The solution is to manually cast one of the u16 to a u32 or u64, which
are large enough to not have any overflow and will prevent the implicit
conversion. The type of the u64 is preferred, though a u32 is used
instead of size_t, since that can change depending on the platform.

Change-Id: I5391221d46d620d0e5bd629e2f9680be7a53342e
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 12297{03,04,05,06,07,08,09,10}
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33986
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2019-07-07 20:59:04 +00:00
Jacob Garber 96e0ce30db util/nvramtool: Mark out_of_memory() as noreturn
This silences several false positives from scan-build.

Change-Id: I327a967c75d6aeec0b3aba16ee696dbae8cf997d
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33950
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-07-07 20:55:59 +00:00
Jacob Garber b592917dcf util/nvramtool: Enable -Wmissing-prototypes
Change-Id: Id751250b07a495dc25293ff703602bfefa9011bd
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33949
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2019-07-07 20:54:04 +00:00
Jacob Garber f2a2137ae2 util/nvramtool: Make internal function static
This function is only used in this file, so it can be made static.

Change-Id: I90e673da91eb926424d1730c268860da7fa1627b
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33948
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2019-07-07 20:26:44 +00:00
Jacob Garber 4177bedd65 util/nvramtool: Include missing header
The prototype for is_ident() is in this header, so include it.

Change-Id: I45e0d58d1b891b18b3eb7741897ab691188a2bd9
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33947
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2019-07-07 20:26:25 +00:00
Jacob Garber 57f2188d86 util/inteltool: Enable -Wmissing-prototypes
Change-Id: I6bf041d089498780ea2b7c52402d7452d44d3f87
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33946
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-07 20:23:55 +00:00
Jacob Garber 6faccd1f00 util/inteltool: Make internal functions static
None of these functions are used outside of the files they are defined
in, so they can all be static.

Change-Id: Ie00fef5a5ba2779e0ff45640cff5cc9f1d096dc1
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33945
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2019-07-07 20:23:42 +00:00
Marshall Dawson 30cf155168 util/cbfstool: Add AMD BIOS compression tool for PSP
Add a utility to generate a compressed BIOS image for AMD Family 17h.

If the input is an elf file, the utility extracts the program portion
for compression.  Otherwise the file is compressed as-is.

In modern AMD systems, the PSP brings up DRAM then uncompresses the
BIOS image into memory prior to x86 beginning execution.  The PSP
supports a zlib engine, and interprets the first 256 bytes as a
header, where offset 0x14 containing the uncompressed size.  For
further details, see AMD Platform Security Processor BIOS Architecture
Design Guide for AMD Family 17h Processors (NDA only, #55758).

BUG=b:127766506
TEST=Use with WIP Picasso

Change-Id: Id1c54e0a6dae9e4a0362c6635fe8b8aa48a369d8
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33401
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2019-07-03 21:28:43 +00:00
Patrick Georgi 848e30daa1 cbfstool: show "preserved" flag in cbfstool layout output
The flag is useful for updaters to determine which areas to leave
alone, such as VPD (vital product data) regions that are set in
factory and might contain unique (MAC addresses) or hard to obtain
(calibration output) data.

It's also useful to see which regions are marked as such.

Change-Id: Ic0a229d474b32ac156cfabc917714ce9d339bac6
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33604
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-07-02 18:48:02 +00:00
Jacob Garber 0476332161 util/cbmem: Enable -Wmissing-prototypes
Change-Id: Ia8482dc9b6ad800826152c2d3e9813190b0b574e
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33853
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-07-02 16:12:21 +00:00
Jacob Garber 79a2f4767d util/cbmem: Make internal functions static
These functions are only used in cbmem, so they can be made static.

Change-Id: I21f7d7c21064a8ae951e6d96b28c2ddcf52c0006
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33852
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-07-02 16:12:09 +00:00
Jacob Garber 4d543b5aa6 util/cbmem: Enable -Wextra
This enables extra useful warnings.

Change-Id: I4afbbb0fefb32a7d954aafd87df17075b0abe6f7
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33851
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-07-02 16:11:57 +00:00
Jacob Garber 414d5d8698 util/cbmem: Use correct integer types for loop indices
Make sure that the type of the loop index matches the type of the upper
bound. This fixes several -Wsign-compare warnings.

Change-Id: Iaa94ce93bc35d523bc782ad914bfd283606becac
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33850
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-07-02 16:11:46 +00:00
Patrick Georgi 328d2e2a7d util/docker/coreboot.org-status: Add more "nice" names for CPUs
It's not perfect and we'll need to find a better place for that,
but I'll look into that as part of the big board-status rework.

Change-Id: I2ae50c58e3796563e0b2370105abc82b7e2e042a
Signed-off-by: Patrick Georgi <patrick@georgi.software>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33930
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-07-02 16:08:18 +00:00
Patrick Georgi 3b34ef29b3 util/release: add more categories
Change-Id: I73cd50da7b2f1aaf1ab05daad4997c5e48172f25
Signed-off-by: Patrick Georgi <patrick@georgi.software>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33929
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-07-02 16:08:05 +00:00
You-Cheng Syu 1430b3995f util/cbmem: Update banner string regular expression
Banner string format has been changed (CB:30935). We should update our
regular expression correspondingly.

Also add "verstage" into the stage search list since some boards (e.g.,
Kukui) might start console initialization at verstage.

Change-Id: I16eba3ac5e203e80b0bfd42a4294401dbccd4463
Signed-off-by: You-Cheng Syu <youcheng@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33779
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2019-07-01 21:21:57 +00:00
Jacob Garber 02b1e20f00 util/ifdtool: Enable -Wmissing-prototypes
Change-Id: Idc31144024f785a42cbad78bf2c965d08dcc5178
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33861
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-07-01 14:30:53 +00:00