Kyösti Mälkki cd7a70f487 soc/intel: Use common romstage code ... This provides stack guards with checking and common entry into postcar. The code in cpu/intel/car/romstage.c is candidate for becoming architectural so function prototype is moved to <arch/romstage.h>. Change-Id: I4c5a9789e7cf3f7f49a4a33e21dac894320a9639 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34893 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2019-08-26 21:08:41 +00:00
..
rk9	mainboards: Remove floating __PRE_RAM__ comments	2019-08-18 09:54:08 +00:00
rk886ex	soc/intel: Use common romstage code	2019-08-26 21:08:41 +00:00
rv11	sb/intel/{bd82x6x|ibexpeak}: Drop p_cnt_throttling_supported	2019-07-19 15:06:23 +00:00
Kconfig
Kconfig.name