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Pratik Prajapati 0175fb1b4f util/mma: Add tools to support (semi) automation test of mma
mma_automated_test.sh takes a config file (/usr/local/mma/tests) as
input and executes all tests mentioned in the config file.

format of the config file is one or more lines mentioned below.

	<MMA test name> <MMA test param> <#count>

e.g. consider following config file.

	Margin1D.efi Margin1DRxVrefConfig.bin 4
	RMT.efi RMTConfig.bin 1
	MarginMapper.efi ScoreTxVref-TxDqDelayConfigCh1.bin 2
	Margin2D.efi Margin2D_Cmd_Ch0_D1_R0_Config.bin 3

This will execute Margin1D.efi MMA test 4 times with
Margin1DRxVrefConfig.bin param and results will be stored
in DUT under /usr/local/mma/results_<date-time-stamp>
with Margin1D_Margin1DRxVrefConfig_1.bin to
Margin1D_Margin1DRxVrefConfig_4.bin name.  Subsequently all tests
will be executed and results will be stored.

/etc/init/mma.conf invokes mma_automated_test.sh when DUT
starts. And if valid test config is preset at /usr/local/mma/tests,
mma_automated_test.sh will continue executing the tests.  Each time
DUT will be rebooted and next test in sequence will be executed.

Overall follow these steps to start MMA.
(1) create /usr/local/mma/tests file with the syntax mentioned above.
(2) either reboot the DUT (mma.conf will be called at each boot time,
which would run the mma_automated_test.sh) or execute "start mma"
command (to save a reboot cycle.)
(3) all test results can be found under
/usr/local/mma/results_<date-time-stamp> where <date-time-stamp> is
YY_MM_DD_HH_mm format (YEAR_MONTH_DAY_HOUR_MINUTE) when you started
the mma tests.

BRANCH=none
BUG=chrome-os-partner:43731
TEST=Build and Boot kunimitsu (FAB3). MMA automation tests executes
and results get saved.

Change-Id: I6805fdb95b7ff919f9c8e967b748e4893a3f9889
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 68c0a531ba3fc335b92b17002e75412195b778c4
Original-Change-Id: I92db7ca47e1e3e581c3fbb413f11e2c3e6d19b6b
Original-Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Original-Signed-off-by: Icarus Sparry <icarus.w.sparry@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/313180
Original-Commit-Ready: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Original-Tested-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/12928
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-10 22:59:15 +02:00
3rdparty 3rdparty/blobs: add more Qualcomm stubs 2016-05-10 21:22:28 +02:00
Documentation Documentation: x86 MTRR setup, TempRamExit and MTRR loading 2016-03-21 20:12:35 +01:00
payloads coreboot_tables: Extend serial port description 2016-05-09 17:21:22 +02:00
src soc/qualcomm/ipq40xx: Streamline memory map 2016-05-10 22:57:50 +02:00
util util/mma: Add tools to support (semi) automation test of mma 2016-05-10 22:59:15 +02:00
.clang-format Provide coreboot coding style formalisation file for clang-format 2015-11-10 00:49:03 +01:00
.gitignore .gitignore: add build and libpayload dirs for nvramcui payload 2016-05-03 04:16:45 +02:00
.gitmodules git modules: rename git submodules to avoid hierarchies 2016-02-11 20:55:55 +01:00
.gitreview
COPYING
MAINTAINERS MAINTAINERS: Add maintainer for Pineview & x4x chipsets & boards 2016-04-19 19:25:59 +02:00
Makefile Makefile: Update payload clean targets 2016-03-09 17:01:56 +01:00
Makefile.inc xip: Do not pass --xip for early stages if CAR supports code execution 2016-05-09 05:01:58 +02:00
README
toolchain.inc toolchain.inc: test IASL by version string instead of number 2016-03-04 16:36:25 +01:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * make
 * gcc / g++
   Because Linux distribution compilers tend to use lots of patches. coreboot
   does lots of "unusual" things in its build system, some of which break due
   to those patches, sometimes by gcc aborting, sometimes - and that's worse -
   by generating broken object code.
   Two options: use our toolchain (eg. make crosstools-i386) or enable the
   ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this
   case).
 * iasl (for targets with ACPI support)

Optional:

 * doxygen (for generating/viewing documentation)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig' and 'make nconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.