coreboot-kgpe-d16/src/arch/x86/llshell
Stefan Reinauer 8677a23d5b After this has been brought up many times before, rename src/arch/i386 to
src/arch/x86. 

Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-11 20:33:41 +00:00
..
console.inc After this has been brought up many times before, rename src/arch/i386 to 2010-12-11 20:33:41 +00:00
llshell.inc After this has been brought up many times before, rename src/arch/i386 to 2010-12-11 20:33:41 +00:00
pci.inc After this has been brought up many times before, rename src/arch/i386 to 2010-12-11 20:33:41 +00:00
ramtest.inc After this has been brought up many times before, rename src/arch/i386 to 2010-12-11 20:33:41 +00:00
readme.coreboot After this has been brought up many times before, rename src/arch/i386 to 2010-12-11 20:33:41 +00:00

readme.coreboot

1) Include llshell.inc in your northbridge Config file
2) In raminit.inc (or whatever), make a jmp out to low_level_shell, setting
   a return label in %esp.
For example:
ram_set_registers:

	mov $llshell_ret1,%esp
	jmp low_level_shell
llshell_ret1:

        /* Disable and invalidate the cache */
        invd
        mov %cr0, %eax
        ....
3) Optionally, comment out two lines in ramtest.inc:
5:
        CONSOLE_INFO_TX_STRING($rt_toomany)
        // post_code(0xf1)
        // jmp  .Lhlt
otherwise, a ramtest failure will hang

4) build and flash as normal
If it worked, the speaker will beep, and you'll get a shell.
Type help or ? at the prompt for a list of commands.