a73b93157f
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
109 lines
2.9 KiB
C
109 lines
2.9 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008-2009 coresystems GmbH
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* Copyright (C) 2014 Google Inc.
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* Copyright (C) 2015 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/io.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/path.h>
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#include <device/smbus.h>
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#include <device/smbus_def.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include <soc/iomap.h>
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#include <soc/ramstage.h>
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#include <soc/smbus.h>
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static void pch_smbus_init(device_t dev)
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{
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struct resource *res;
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u16 reg16;
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/* Enable clock gating */
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reg16 = pci_read_config32(dev, 0x80);
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reg16 &= ~((1 << 8)|(1 << 10)|(1 << 12)|(1 << 14));
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pci_write_config32(dev, 0x80, reg16);
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/* Set Receive Slave Address */
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res = find_resource(dev, PCI_BASE_ADDRESS_4);
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if (res)
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outb(SMBUS_SLAVE_ADDR, res->base + SMB_RCV_SLVA);
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}
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static int lsmbus_read_byte(device_t dev, u8 address)
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{
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u16 device;
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struct resource *res;
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struct bus *pbus;
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device = dev->path.i2c.device;
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pbus = get_pbus_smbus(dev);
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res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
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return do_smbus_read_byte(res->base, device, address);
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}
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static int lsmbus_write_byte(device_t dev, u8 address, u8 data)
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{
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u16 device;
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struct resource *res;
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struct bus *pbus;
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device = dev->path.i2c.device;
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pbus = get_pbus_smbus(dev);
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res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
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return do_smbus_write_byte(res->base, device, address, data);
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}
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static struct smbus_bus_operations lops_smbus_bus = {
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.read_byte = lsmbus_read_byte,
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.write_byte = lsmbus_write_byte,
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};
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static void smbus_read_resources(device_t dev)
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{
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struct resource *res = new_resource(dev, PCI_BASE_ADDRESS_4);
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res->base = SMBUS_BASE_ADDRESS;
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res->size = 32;
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res->limit = res->base + res->size - 1;
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res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE |
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IORESOURCE_STORED | IORESOURCE_ASSIGNED;
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/* Also add MMIO resource */
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res = pci_get_resource(dev, PCI_BASE_ADDRESS_0);
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}
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static struct device_operations smbus_ops = {
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.read_resources = &smbus_read_resources,
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.set_resources = &pci_dev_set_resources,
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.enable_resources = &pci_dev_enable_resources,
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.scan_bus = &scan_smbus,
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.init = &pch_smbus_init,
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.ops_smbus_bus = &lops_smbus_bus,
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.ops_pci = &soc_pci_ops,
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};
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static const unsigned short pci_device_ids[] = {
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0x9d23, /* SunRisePoint LP */
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0
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};
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static const struct pci_driver pch_smbus __pci_driver = {
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.ops = &smbus_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.devices = pci_device_ids,
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};
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