coreboot-kgpe-d16/src
Raul E Rangel 0318dc169e soc/amd/common/block/espi: Increase ESPI_CH_READY_TIMEOUT_US to 10ms
The ChromeEC might take longer than 1ms for the peripheral channel to be
enabled. The PLTRST# interrupt handler takes about ~539us.
This doesn't account for the time it takes for the interrupt handler
to be scheduled. Increasing the timeout to 10ms gives ample time.

BUG=b:188188172, b:188935533
TEST=Boot guybrush and no longer see channel enable errors

Suggested-by: Rob Barnes <robbarnes@google.com>
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ib6db577bf06175ceb17b446af706ad8c9f891481
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54788
Reviewed-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-25 15:20:27 +00:00
..
acpi src/acpi: Add initial support for HMAT 2021-05-14 08:56:59 +00:00
arch option: Introduce `CMOS_LAYOUT_FILE` Kconfig symbol 2021-05-18 11:43:49 +00:00
commonlib commonlib/region: Turn addrspace_32bit into a more official API 2021-04-21 02:06:26 +00:00
console src: Retype option API to use unsigned integers 2021-05-06 14:48:15 +00:00
cpu cpu/intel/fit: Fix top swap fit 2021-05-25 12:36:47 +00:00
device device: Consider fw_config probing in `is_dev_enabled()` 2021-05-24 16:55:39 +00:00
drivers drivers/gpio_keys: Add SW_MUTE_DEVICE 2021-05-20 20:40:47 +00:00
ec ec/google/chromeec: Implement support for DRIVERS_ACPI_THERMAL_ZONE 2021-05-20 08:01:19 +00:00
include device: Consider fw_config probing in `is_dev_enabled()` 2021-05-24 16:55:39 +00:00
lib fw_config: Add helper function `fw_config_probe_dev` 2021-05-24 16:55:27 +00:00
mainboard mb/google/puff/var/dooly: Update CPU PSV to 85 degrees. 2021-05-24 19:58:44 +00:00
northbridge nb/intel/gm45: Guard even more macro parameters 2021-05-16 21:53:36 +00:00
security security/tpm/tspi: Always measure the cache to pcr 2021-05-21 11:22:51 +00:00
soc soc/amd/common/block/espi: Increase ESPI_CH_READY_TIMEOUT_US to 10ms 2021-05-25 15:20:27 +00:00
southbridge sb/intel/lynxpoint: Add pch_iobp_exec() function 2021-05-20 16:04:05 +00:00
superio src: Retype option API to use unsigned integers 2021-05-06 14:48:15 +00:00
vendorcode soc/amd/cezanne,common,picasso: use BERT region reserved by FSP driver 2021-05-21 11:22:59 +00:00
Kconfig option: Introduce `CMOS_LAYOUT_FILE` Kconfig symbol 2021-05-18 11:43:49 +00:00