f3faddc486
The name `..._index` is confusing since the maximum index of an array is not `ARRAY_SIZE(array)` but `ARRAY_SIZE(array) - 1`. Rename `uart_max_index` to `uart_ctrlr_config_size` to make the name match the variable´s value. Change-Id: I7409c9dc040c3c6ad718abc96f268c187d50d79c Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49305 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Furquan Shaikh <furquan@google.com>
41 lines
1,005 B
C
41 lines
1,005 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/console.h>
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#include <device/pci_def.h>
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#include <intelblocks/gpio.h>
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#include <intelblocks/lpss.h>
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#include <intelblocks/pcr.h>
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#include <intelblocks/uart.h>
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#include <soc/iomap.h>
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#include <soc/pch.h>
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#include <soc/pci_devs.h>
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#include <soc/pcr_ids.h>
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const struct uart_controller_config uart_ctrlr_config[] = {
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{
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.console_index = 0,
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.devfn = PCH_DEVFN_UART0,
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.gpios = {
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PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0 RX */
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PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), /* UART0 TX */
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},
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},
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{
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.console_index = 1,
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.devfn = PCH_DEVFN_UART1,
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.gpios = {
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PAD_CFG_NF(GPP_C12, NONE, DEEP, NF1), /* UART1 RX */
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PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1), /* UART1 TX */
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},
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},
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{
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.console_index = 2,
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.devfn = PCH_DEVFN_UART2,
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.gpios = {
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PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* UART2 RX */
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PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* UART2 TX */
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},
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}
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};
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const int uart_ctrlr_config_size = ARRAY_SIZE(uart_ctrlr_config);
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