coreboot-kgpe-d16/src
Tim Wawrzynczak 03465f4b0f dptf: Add support for IDSP
\_SB.DPTF.IDSP adverties to the DPTF daemon which policies the
implementation supports. Added a new acpigen function to figure out
which policies are used, and fills out IDSP appropriately.

Change-Id: Idf67a23bf38de4481c02f98ffb27afb8ca2d1b7b
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2020-07-07 17:23:47 +00:00
..
acpi dptf: Add support for IDSP 2020-07-07 17:23:47 +00:00
arch arch/x86: Remove RELOCATABLE_RAMSTAGE 2020-07-06 06:17:47 +00:00
commonlib lib/coreboot_table: Add Intel FSP version to coreboot table 2020-07-04 11:20:08 +00:00
console console: Update for vboot before bootblock 2020-06-15 22:07:12 +00:00
cpu ACPI GNVS: Replace uses of smm_get_gnvs() 2020-07-01 05:14:24 +00:00
device Kconfig: Escape variable to accommodate new Kconfig versions 2020-06-19 15:29:04 +00:00
drivers dptf: Add support for IDSP 2020-07-07 17:23:47 +00:00
ec ec/google/chromeec: Drop codec.asl 2020-07-05 18:34:23 +00:00
include dptf: Add support for IDSP 2020-07-07 17:23:47 +00:00
lib prog_loaders: Fix ramstage loading on x86 2020-07-06 09:36:15 +00:00
mainboard mb/google/zork: update telemetry settings for dalboz 2020-07-07 08:56:03 +00:00
northbridge nb/intel/i440bx: Add PMCR register to ACPI code 2020-07-06 06:27:36 +00:00
security arch/x86: Remove RELOCATABLE_RAMSTAGE 2020-07-06 06:17:47 +00:00
soc soc/intel/{tiger,jasper}lake: Add IPU to soc_acpi_name 2020-07-07 17:07:11 +00:00
southbridge sb/intel/i82801jx/sata.c: Handle ABAR as a resource 2020-07-06 23:34:21 +00:00
superio superio/winbond/w83977tf: Add suspend related fields 2020-06-16 20:17:26 +00:00
vendorcode vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2194 2020-07-06 06:08:03 +00:00
Kconfig arch/x86: Remove RELOCATABLE_RAMSTAGE 2020-07-06 06:17:47 +00:00