8bad6d2f90
Fix the following errors and warning detected by checkpatch.pl:
ERROR: spaces required around that '=' (ctx:VxV)
ERROR: space prohibited after that open parenthesis '('
ERROR: need consistent spacing around '|' (ctx:WxV)
ERROR: need consistent spacing around '|' (ctx:VxW)
ERROR: spaces required around that '=' (ctx:VxV)
ERROR: spaces required around that '==' (ctx:VxV)
ERROR: spaces required around that ':' (ctx:ExV)
WARNING: space prohibited between function name and open parenthesis '('
TEST=Build and run on Galileo Gen2
Change-Id: I61d08055b207c607d5b7d72b0094ad8e24fbd106
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18840
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
85 lines
2.5 KiB
C
85 lines
2.5 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <cpu/x86/lapic.h>
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#include <console/console.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/mtrr.h>
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void setup_lapic(void)
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{
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/* this is so interrupts work. This is very limited scope --
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* linux will do better later, we hope ...
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*/
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/* this is the first way we learned to do it. It fails on real SMP
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* stuff. So we have to do things differently ...
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* see the Intel mp1.4 spec, page A-3
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*/
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#if NEED_LAPIC == 1
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/* Only Pentium Pro and later have those MSR stuff */
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msr_t msr;
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printk(BIOS_INFO, "Setting up local APIC...");
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/* Enable the local APIC */
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msr = rdmsr(LAPIC_BASE_MSR);
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msr.lo |= LAPIC_BASE_MSR_ENABLE;
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msr.lo &= ~LAPIC_BASE_MSR_ADDR_MASK;
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msr.lo |= LAPIC_DEFAULT_BASE;
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wrmsr(LAPIC_BASE_MSR, msr);
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/*
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* Set Task Priority to 'accept all'.
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*/
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lapic_write_around(LAPIC_TASKPRI,
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lapic_read_around(LAPIC_TASKPRI) & ~LAPIC_TPRI_MASK);
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/* Put the local APIC in virtual wire mode */
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lapic_write_around(LAPIC_SPIV,
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(lapic_read_around(LAPIC_SPIV) & ~(LAPIC_VECTOR_MASK))
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| LAPIC_SPIV_ENABLE);
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lapic_write_around(LAPIC_LVT0,
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(lapic_read_around(LAPIC_LVT0) &
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~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
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LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
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LAPIC_SEND_PENDING | LAPIC_LVT_RESERVED_1 |
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LAPIC_DELIVERY_MODE_MASK))
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| (LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING |
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LAPIC_DELIVERY_MODE_EXTINT)
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);
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lapic_write_around(LAPIC_LVT1,
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(lapic_read_around(LAPIC_LVT1) &
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~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
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LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
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LAPIC_SEND_PENDING | LAPIC_LVT_RESERVED_1 |
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LAPIC_DELIVERY_MODE_MASK))
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| (LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING |
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LAPIC_DELIVERY_MODE_NMI)
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);
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printk(BIOS_DEBUG, " apic_id: 0x%02lx ", lapicid());
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#else /* !NEED_LAPIC */
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/* Only Pentium Pro and later have those MSR stuff */
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msr_t msr;
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printk(BIOS_INFO, "Disabling local APIC...");
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msr = rdmsr(LAPIC_BASE_MSR);
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msr.lo &= ~LAPIC_BASE_MSR_ENABLE;
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wrmsr(LAPIC_BASE_MSR, msr);
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#endif /* !NEED_LAPIC */
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printk(BIOS_INFO, "done.\n");
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post_code(0x9b);
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}
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