0594914dec
this is a preparation for porting these drivers to coreboot. the code will be modified by the following patches. BUG=chrome-os-partner:33647 BRANCH=ToT TEST=None Change-Id: I2baeed5b6130ace2515d6e28115f8d1008004976 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 7c03a186a599be9d274c6fcdea1906529cc117d7 Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I9f3428ef02d2ba15ae63c99b10fe0605dd595313 Original-Reviewed-on: https://chromium-review.googlesource.com/231461 Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Original-Commit-Queue: Vadim Bendebury <vbendeb@chromium.org> Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: http://review.coreboot.org/9582 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
143 lines
3.8 KiB
C
143 lines
3.8 KiB
C
/*
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* This file is part of the depthcharge project.
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*
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* Copyright (C) 2014 The Linux Foundation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <assert.h>
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#include <libpayload.h>
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#include "base/container_of.h"
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#include "drivers/bus/i2c/i2c.h"
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#include "drivers/bus/i2c/ipq806x_qup.h"
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#include "drivers/bus/i2c/ipq806x_gsbi.h"
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#include "drivers/bus/i2c/ipq806x.h"
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static int i2c_init(unsigned gsbi_id)
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{
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gsbi_return_t gsbi_ret = 0;
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qup_return_t qup_ret = 0;
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qup_config_t gsbi4_qup_config = {
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QUP_MINICORE_I2C_MASTER,
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100000,
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24000000,
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QUP_MODE_FIFO
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};
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gsbi_ret = gsbi_init(gsbi_id, GSBI_PROTO_I2C_ONLY);
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if (GSBI_SUCCESS != gsbi_ret)
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return 1;
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qup_ret = qup_init(gsbi_id, &gsbi4_qup_config);
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if (QUP_SUCCESS != qup_ret)
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return 1;
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qup_ret = qup_reset_i2c_master_status(gsbi_id);
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if (QUP_SUCCESS != qup_ret)
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return 1;
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return 0;
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}
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static int i2c_read(uint32_t gsbi_id, uint8_t slave,
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uint8_t *data, int data_len)
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{
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qup_data_t obj;
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qup_return_t qup_ret = 0;
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memset(&obj, 0, sizeof(obj));
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obj.protocol = QUP_MINICORE_I2C_MASTER;
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obj.p.iic.addr = slave;
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obj.p.iic.data_len = data_len;
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obj.p.iic.data = data;
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qup_ret = qup_recv_data(gsbi_id, &obj);
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if (QUP_SUCCESS != qup_ret)
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return 1;
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else
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return 0;
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}
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static int i2c_write(uint32_t gsbi_id, uint8_t slave,
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uint8_t *data, int data_len, uint8_t stop_seq)
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{
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qup_data_t obj;
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qup_return_t qup_ret = 0;
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memset(&obj, 0, sizeof(obj));
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obj.protocol = QUP_MINICORE_I2C_MASTER;
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obj.p.iic.addr = slave;
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obj.p.iic.data_len = data_len;
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obj.p.iic.data = data;
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qup_ret = qup_send_data(gsbi_id, &obj, stop_seq);
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if (QUP_SUCCESS != qup_ret)
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return 1;
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else
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return 0;
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}
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static int i2c_transfer(struct I2cOps *me, I2cSeg *segments, int seg_count)
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{
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Ipq806xI2c *bus = container_of(me, Ipq806xI2c, ops);
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I2cSeg *seg = segments;
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int ret = 0;
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if (!bus->initialized)
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if (0 != i2c_init(bus->gsbi_id))
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return 1;
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while (seg_count--) {
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if (seg->read)
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ret = i2c_read(bus->gsbi_id, seg->chip,
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seg->buf, seg->len);
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else
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ret = i2c_write(bus->gsbi_id, seg->chip,
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seg->buf, seg->len,
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(seg_count ? 0 : 1));
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seg++;
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}
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if (QUP_SUCCESS != ret) {
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qup_set_state(bus->gsbi_id, QUP_STATE_RESET);
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return 1;
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}
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return 0;
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}
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Ipq806xI2c *new_ipq806x_i2c(unsigned gsbi_id)
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{
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Ipq806xI2c *bus = 0;
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if (!i2c_init(gsbi_id)) {
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bus = xzalloc(sizeof(*bus));
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bus->gsbi_id = gsbi_id;
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bus->initialized = 1;
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bus->ops.transfer = &i2c_transfer;
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}
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return bus;
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}
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