d30722d445
Also, if there's only one image, it should be named "fallback", not "normal". Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4600 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
58 lines
1.3 KiB
Text
58 lines
1.3 KiB
Text
# Config file for the Total Impact briQ
|
|
# This will make a target directory of ./briq
|
|
|
|
target briq
|
|
|
|
mainboard totalimpact/briq
|
|
|
|
## Use stage 1 initialization code
|
|
option CONFIG_USE_INIT=1
|
|
|
|
## We don't use compressed image
|
|
option CONFIG_COMPRESS=0
|
|
|
|
## Turn off POST codes
|
|
option CONFIG_NO_POST=1
|
|
|
|
## Enable serial console
|
|
option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
|
|
option CONFIG_CONSOLE_SERIAL8250=1
|
|
|
|
## Boot linux from IDE
|
|
option CONFIG_IDE_PAYLOAD=1
|
|
option CONFIG_IDE_BOOT_DRIVE=0
|
|
option CONFIG_IDE_SWAB=1
|
|
option CONFIG_IDE_OFFSET=0
|
|
|
|
# ROM is 1Mb
|
|
option CONFIG_ROM_SIZE=1024*1024
|
|
|
|
# Set stack and heap sizes (stage 2)
|
|
option CONFIG_STACK_SIZE=0x10000
|
|
option CONFIG_HEAP_SIZE=0x10000
|
|
|
|
# Sandpoint Demo Board
|
|
romimage "fallback"
|
|
## Base of ROM
|
|
option CONFIG_ROMBASE=0xfff00000
|
|
|
|
## Sandpoint reset vector
|
|
option CONFIG_RESET=CONFIG_ROMBASE+0x100
|
|
|
|
## Exception vectors (other than reset vector)
|
|
option CONFIG_EXCEPTION_VECTORS=CONFIG_RESET+0x100
|
|
|
|
## Start of coreboot in the boot rom
|
|
## = CONFIG_RESET + exeception vector table size
|
|
option CONFIG_ROMSTART=CONFIG_RESET+0x3100
|
|
|
|
## Coreboot C code runs at this location in RAM
|
|
option CONFIG_RAMBASE=0x00100000
|
|
option CONFIG_RAMSTART=0x00100000
|
|
|
|
option CONFIG_BRIQ_750FX=1
|
|
#option CONFIG_BRIQ_7400=1
|
|
|
|
end
|
|
|
|
buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback"
|