coreboot-kgpe-d16/src/soc/amd/cezanne
Felix Held 060b8ad7a3 soc/amd/cezanne: add empty CPU driver
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I54299cadae4cb562e04a16c3b8e051c9c454db79
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50404
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-02-09 20:46:50 +00:00
..
include/soc soc/amd/cezanne: Enable early LPC support in bootblock stage 2021-02-09 20:41:03 +00:00
aoac.c soc/amd/cezanne: add AOAC support 2021-01-14 15:42:34 +00:00
bootblock.c soc/amd/cezanne: add caching setup in bootblock 2020-12-13 22:18:03 +00:00
chip.c soc/amd,intel: Drop s3_resume parameter on FSP-S functions 2021-02-09 07:53:23 +00:00
chip.h soc/amd/cezanne: add config.c and minimal chip.h 2020-12-06 19:05:47 +00:00
chipset.cb soc/amd/cezzane: Add a minimal chipset tree 2021-01-11 07:42:12 +00:00
config.c soc/amd/cezanne: add config.c and minimal chip.h 2020-12-06 19:05:47 +00:00
cpu.c soc/amd/cezanne: add empty CPU driver 2021-02-09 20:46:50 +00:00
early_fch.c soc/amd/cezanne: Enable early LPC support in bootblock stage 2021-02-09 20:41:03 +00:00
fch.c soc/amd/cezanne/fch: add ACPI I/O port setup 2021-02-05 22:05:59 +00:00
fsp_params.c soc,vendorcode/amd/cezanne: add basic FSP integration 2021-01-24 18:15:46 +00:00
fw.cfg amdfwtool:cezanne: Add entry of PSP_BOOTLOADER_AB (0x73) 2021-02-03 13:48:51 +00:00
gpio.c soc/amd/cezanne: add GPIO support 2020-12-18 17:20:56 +00:00
Kconfig soc/amd/cezanne: Enable early LPC support in bootblock stage 2021-02-09 20:41:03 +00:00
Makefile.inc soc/amd/cezanne: add empty CPU driver 2021-02-09 20:46:50 +00:00
pcie_gpp.c soc/amd/cezanne/pcie_gpp: scan internal PCI buses 2021-02-07 17:48:59 +00:00
reset.c soc/amd/cezanne: add 0xcf9 reset 2020-12-11 17:44:42 +00:00
romstage.c soc/amd/cezanne/romstage: Store early dram region 2021-02-07 18:08:07 +00:00
uart.c soc/amd/cezanne,picasso/uart: remove unneeded struct name 2021-01-15 01:19:59 +00:00