Arthur Heymans 06f818c932 cpu/intel/smm/gen1: Use correct MSR for model_6fx and model_1067x ... According to the "Intel® 64 and IA-32 Architectures Software Developer’s Manual" the SMRR MSR are at a different offset for model_6fx and model_1067x. This still need SMRR enabled and lock bit set in MSR_FEATURE_CONTROL. Change-Id: I8ee8292ab038e58deb8c24745ec1a9b5da8c31a9 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/27585 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>		2018-07-30 19:03:27 +00:00
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allwinner	src/cpu: Get rid of whitespace before tab	2018-06-04 09:13:11 +00:00
amd	src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar"	2018-07-09 09:26:18 +00:00
armltd
intel	cpu/intel/smm/gen1: Use correct MSR for model_6fx and model_1067x	2018-07-30 19:03:27 +00:00
qemu-power8	Constify struct cpu_device_id instances	2017-11-23 05:00:17 +00:00
qemu-x86	Constify struct cpu_device_id instances	2017-11-23 05:00:17 +00:00
ti	cubieboard/qemu-armv7/am335x: Add fake TTB region for consistency	2018-04-30 06:26:41 +00:00
via	src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar"	2018-07-09 09:26:18 +00:00
x86	smm: Add canary to end of stack and die() if a stack overflow occurs	2018-06-28 09:01:02 +00:00
Kconfig	arch/x86: Drop leftover ROMCC support	2018-06-06 10:28:00 +00:00
Makefile.inc	DMP Vortex86ex board & chip: Remove - using LATE_CBMEM_INIT	2018-01-15 23:23:17 +00:00