coreboot-kgpe-d16/src/arch/i386/boot/tables.c
Stefan Reinauer 0867062412 This patch unifies the use of config options in v2 to all start with CONFIG_
It's basically done with the following script and some manual fixup:

VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
	find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30 15:17:49 +00:00

184 lines
5.3 KiB
C

/*
* This file is part of the coreboot project.
*
* Copyright (C) 2003 Eric Biederman
* Copyright (C) 2005 Steve Magnani
* Copyright (C) 2008-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/* 2006.1 yhlu add mptable cross 0x467 processing */
#include <console/console.h>
#include <cpu/cpu.h>
#include <boot/tables.h>
#include <boot/coreboot_tables.h>
#include <arch/pirq_routing.h>
#include <arch/smp/mpspec.h>
#include <arch/acpi.h>
#include <string.h>
#include <cpu/x86/multiboot.h>
#include "coreboot_table.h"
// Global Descriptor Table, defined in c_start.S
extern uint8_t gdt;
extern uint8_t gdt_end;
/* i386 lgdt argument */
struct gdtarg {
unsigned short limit;
unsigned int base;
} __attribute__((packed));
// Copy GDT to new location and reload it
void move_gdt(unsigned long newgdt)
{
uint16_t num_gdt_bytes = &gdt_end - &gdt;
struct gdtarg gdtarg;
printk_debug("Moving GDT to %#lx...", newgdt);
memcpy((void*)newgdt, &gdt, num_gdt_bytes);
gdtarg.base = newgdt;
gdtarg.limit = num_gdt_bytes - 1;
__asm__ __volatile__ ("lgdt %0\n\t" : : "m" (gdtarg));
printk_debug("ok\n");
}
uint64_t high_tables_base = 0;
uint64_t high_tables_size;
struct lb_memory *write_tables(void)
{
unsigned long low_table_start, low_table_end;
unsigned long rom_table_start, rom_table_end;
/* Even if high tables are configured, some tables are copied both to
* the low and the high area, so payloads and OSes don't need to know
* about the high tables.
*/
unsigned long high_table_end=0;
if (high_tables_base) {
printk_debug("High Tables Base is %llx.\n", high_tables_base);
high_table_end = high_tables_base;
} else {
printk_err("ERROR: High Tables Base is not set.\n");
}
rom_table_start = 0xf0000;
rom_table_end = 0xf0000;
/* Start low addr at 0x500, so we don't run into conflicts with the BDA
* in case our data structures grow beyound 0x400. Only multiboot, GDT
* and the coreboot table use low_tables.
*/
low_table_start = 0;
low_table_end = 0x500;
post_code(0x99);
/* This table must be between 0x0f0000 and 0x100000 */
rom_table_end = write_pirq_routing_table(rom_table_end);
rom_table_end = ALIGN(rom_table_end, 1024);
/* And add a high table version for those payloads that
* want to live in the F segment
*/
if (high_tables_base) {
high_table_end = write_pirq_routing_table(high_table_end);
high_table_end = ALIGN(high_table_end, 1024);
}
post_code(0x9a);
/* Write ACPI tables to F segment and high tables area */
#if CONFIG_HAVE_ACPI_TABLES == 1
if (high_tables_base) {
unsigned long acpi_start = high_table_end;
rom_table_end = ALIGN(rom_table_end, 16);
high_table_end = write_acpi_tables(high_table_end);
while (acpi_start < high_table_end) {
if (memcmp(((acpi_rsdp_t *)acpi_start)->signature, RSDP_SIG, 8) == 0) {
break;
}
acpi_start++;
}
if (acpi_start != high_table_end) {
acpi_write_rsdp((acpi_rsdp_t *)rom_table_end, ((acpi_rsdp_t *)acpi_start)->rsdt_address);
} else {
printk_err("ERROR: Didn't find RSDP in high table.\n");
}
high_table_end = ALIGN(high_table_end, 1024);
rom_table_end = ALIGN(rom_table_end + sizeof(acpi_rsdp_t), 16);
} else {
rom_table_end = write_acpi_tables(rom_table_end);
rom_table_end = ALIGN(rom_table_end, 1024);
}
#endif
post_code(0x9b);
#if CONFIG_HAVE_MP_TABLE == 1
/* The smp table must be in 0-1K, 639K-640K, or 960K-1M */
rom_table_end = write_smp_table(rom_table_end);
rom_table_end = ALIGN(rom_table_end, 1024);
/* ... and a copy in the high tables */
if (high_tables_base) {
high_table_end = write_smp_table(high_table_end);
high_table_end = ALIGN(high_table_end, 1024);
}
#endif /* CONFIG_HAVE_MP_TABLE */
post_code(0x9c);
// Relocate the GDT to reserved memory, so it won't get clobbered
if (high_tables_base) {
move_gdt(high_table_end);
high_table_end += &gdt_end - &gdt;
high_table_end = ALIGN(high_table_end, 1024);
} else {
move_gdt(low_table_end);
low_table_end += &gdt_end - &gdt;
}
post_code(0x9d);
#if CONFIG_MULTIBOOT
/* The Multiboot information structure */
rom_table_end = write_multiboot_info(
low_table_start, low_table_end,
rom_table_start, rom_table_end);
#endif
post_code(0x9e);
if (high_tables_base) {
/* Also put a forwarder entry into 0-4K */
write_coreboot_table(low_table_start, low_table_end,
high_tables_base, high_table_end);
if (high_table_end > high_tables_base + high_tables_size)
printk_err("%s: High tables didn't fit in %llx (%llx)\n",
__func__, high_tables_size, high_table_end -
high_tables_base);
} else {
/* The coreboot table must be in 0-4K or 960K-1M */
write_coreboot_table(low_table_start, low_table_end,
rom_table_start, rom_table_end);
}
post_code(0x9f);
return get_lb_mem();
}