09cdecec9c
Use a read modify write sequence when setting the SPI_USE_SPI100 bit in the SPI100_ENABLE register. This avoids clearing other bits in the register which might cause instabilities of the SPI interface. The reference code for both Picasso and Cezanne also only sets the SPI_USE_SPI100 bit and doesn't zero out the other bits. TEST=Verified that Mandolin still boots. It didn't show any signs of possibly related instabilities before though, so this test doesn't say much. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I71c2ec1729d5cb4cdff6444b637af29caaa6f1c0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59932 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> |
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| acpi | ||
| block | ||
| fsp | ||
| pi | ||
| psp_verstage | ||
| vboot | ||
| Kconfig.common | ||
| Makefile.inc | ||