0fa50a1990
This patch adds support for autogenerating the MPTABLE from devicetree.cb. This is done by a write_smp_table() declared weak in mpspec.c. If the mainboard doesn't provide it's own function, this generic implementation is called. Syntax in devicetree.cb: ioapic_irq <APICID> <INTA|INTB|INTC|INTD> <INTPIN> The ioapic_irq directive can be used in pci and pci_domain devices. If there's no directive, the autogen code traverses the tree back to the pci_domain and stops at the first device which such a directive, and use that information to generate the entry according to PCI IRQ routing rules. Change-Id: I4df5b198e8430f939d477c14c798414e398a2027 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/1138 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
77 lines
2.7 KiB
Text
Executable file
77 lines
2.7 KiB
Text
Executable file
%{
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/*
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* sconfig, coreboot device tree compiler
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*
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* Copyright (C) 2010 coresystems GmbH
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* written by Patrick Georgi <patrick.georgi@coresystems.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
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*/
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#include "sconfig.h"
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static struct device *cur_parent, *cur_bus;
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%}
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%union {
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struct device *device;
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char *string;
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int number;
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}
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%token CHIP DEVICE REGISTER BOOL BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC APIC_CLUSTER PCI_DOMAIN IRQ DRQ IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT
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%%
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devtree: { cur_parent = cur_bus = head; } chip { postprocess_devtree(); } ;
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chipchildren: chipchildren device | chipchildren chip | chipchildren registers | /* empty */ ;
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devicechildren: devicechildren device | devicechildren chip | devicechildren resource | devicechildren subsystemid | devicechildren ioapic_irq | /* empty */ ;
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chip: CHIP STRING /* == path */ {
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$<device>$ = new_chip(cur_parent, cur_bus, $<string>2);
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cur_parent = $<device>$;
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}
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chipchildren END {
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cur_parent = $<device>3->parent;
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fold_in($<device>3);
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add_header($<device>3);
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};
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device: DEVICE BUS NUMBER /* == devnum */ BOOL {
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$<device>$ = new_device(cur_parent, cur_bus, $<number>2, $<string>3, $<number>4);
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cur_parent = $<device>$;
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cur_bus = $<device>$;
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}
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devicechildren END {
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cur_parent = $<device>5->parent;
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cur_bus = $<device>5->bus;
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fold_in($<device>5);
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alias_siblings($<device>5->children);
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};
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resource: RESOURCE NUMBER /* == resnum */ EQUALS NUMBER /* == resval */
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{ add_resource(cur_parent, $<number>1, strtol($<string>2, NULL, 0), strtol($<string>4, NULL, 0)); } ;
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registers: REGISTER STRING /* == regname */ EQUALS STRING /* == regval */
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{ add_register(cur_parent, $<string>2, $<string>4); } ;
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subsystemid: SUBSYSTEMID NUMBER NUMBER
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{ add_pci_subsystem_ids(cur_parent, strtol($<string>2, NULL, 16), strtol($<string>3, NULL, 16), 0); };
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subsystemid: SUBSYSTEMID NUMBER NUMBER INHERIT
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{ add_pci_subsystem_ids(cur_parent, strtol($<string>2, NULL, 16), strtol($<string>3, NULL, 16), 1); };
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ioapic_irq: IOAPIC_IRQ NUMBER PCIINT NUMBER
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{ add_ioapic_info(cur_parent, strtol($<string>2, NULL, 16), $<string>3, strtol($<string>4, NULL, 16)); };
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%%
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