f8ee1806ac
Due to the automatic nature of this update, I am self-acking. It worked in abuild. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
48 lines
1 KiB
Text
48 lines
1 KiB
Text
# abuild config file for EPIA-M
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target via_epia-m
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mainboard via/epia-m
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option MAXIMUM_CONSOLE_LOGLEVEL=8
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option DEFAULT_CONSOLE_LOGLEVEL=8
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option CONFIG_CONSOLE_SERIAL8250=1
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option ROM_SIZE=256*1024
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option HAVE_OPTION_TABLE=1
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option CONFIG_ROM_PAYLOAD=1
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option HAVE_FALLBACK_BOOT=1
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#option CONFIG_COMPRESSED_PAYLOAD_NRV2B=1
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option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0
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###
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### Compute the location and size of where this firmware image
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### (coreboot plus bootloader) will live in the boot rom chip.
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###
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option FALLBACK_SIZE=131072
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## Coreboot C code runs at this location in RAM
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option _RAMBASE=0x00004000
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#
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# Via EPIA M
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#
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romimage "normal"
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option USE_FALLBACK_IMAGE=0
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#option ROM_IMAGE_SIZE=128*1024
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option ROM_IMAGE_SIZE=64*1024
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option COREBOOT_EXTRA_VERSION=".0-Normal"
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payload $(HOME)/svn/payload.elf
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end
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romimage "fallback"
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option USE_FALLBACK_IMAGE=1
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#option ROM_IMAGE_SIZE=128*1024
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option ROM_IMAGE_SIZE=60*1024
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option COREBOOT_EXTRA_VERSION=".0-Fallback"
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payload $(HOME)/svn/payload.elf
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end
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buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"
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