Angel Pons 0c0d49229d soc/intel: Replace open-coded buffer length calculation ... Use `sizeof(value)` instead of manually calculating the buffer size. Change-Id: Ibe49e40b1c4f2c0b661d94e59059a95bdb204197 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52107 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>		2021-04-21 14:21:44 +00:00
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acpi	soc/intel/alderlake: Skip D3Cold for TBT	2021-04-10 12:00:33 +00:00
bootblock	soc/intel/alderlake: Add LPC and IGD device Ids for Alderlake M	2021-04-06 07:51:05 +00:00
include/soc	soc/intel/alderlake: Allow devicetree to fill UPD related to TCSS OC	2021-04-16 06:44:28 +00:00
romstage	soc/intel/alderlake: Enable CSE Lite driver for ADL platform in romstage	2021-03-17 08:01:14 +00:00
spd	util: Add new memory part to LP4x list	2021-03-03 15:50:47 +00:00
acpi.c	soc/intel: Factor out identical acpigen GPIO helpers	2021-03-01 19:37:56 +00:00
chip.c	soc/intel: Replace open-coded buffer length calculation	2021-04-21 14:21:44 +00:00
chip.h	soc/intel/alderlake: Allow devicetree to fill UPD related to TCSS OC	2021-04-16 06:44:28 +00:00
chipset.cb	soc/intel/alderlake: Remove obsolete CNVi Bluetooth PCI device	2021-03-15 06:25:20 +00:00
cpu.c
elog.c	soc/intel/alderlake: Log internal device wake events	2021-03-03 09:04:12 +00:00
espi.c
finalize.c
fsp_params.c	soc/intel/alderlake: Allow devicetree to fill UPD related to TCSS OC	2021-04-16 06:44:28 +00:00
gpio.c	soc/intel/alderlake: Correct GPE DWx assignment as per EDS	2021-03-27 04:22:11 +00:00
gspi.c
i2c.c
Kconfig	soc/intel/alderlake: Enable PCIE RTD3 driver	2021-04-21 09:20:07 +00:00
lockdown.c
Makefile.inc	soc/intel/alderlake: Enable logging of wake sources for S0ix	2021-03-30 15:37:18 +00:00
me.c
meminit.c	soc/intel/alderlake: Add provision to override Rcomp settings	2021-03-26 04:53:18 +00:00
p2sb.c
pcie_rp.c
pmc.c
pmutil.c	soc/intel/*/pmutil.c: Align cosmetics across platforms	2021-02-24 11:34:42 +00:00
reset.c
smihandler.c
soundwire.c
spi.c
systemagent.c	soc/intel/alderlake: add processor power limits control support	2021-03-28 16:08:02 +00:00
uart.c	soc/intel/*: drop UART pad configuration from common code	2021-03-12 08:48:03 +00:00
xhci.c