dea4e0fe68
This brings the AMD SoC GPIO code in line with the Intel SoC code and removes the not really needed suffix. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ie2dbec81dfe503869beb2872b01a7475e2b88b33 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57842 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
56 lines
1.3 KiB
C
56 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/gpio.h>
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#include <amdblocks/smi.h>
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#include <bootstate.h>
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#include <device/device.h>
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#include <drivers/usb/pci_xhci/pci_xhci.h>
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#include <soc/pci_devs.h>
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#include <soc/smi.h>
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#include <soc/soc_util.h>
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static const struct sci_source xhci_sci_sources[] = {
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{
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.scimap = SMITYPE_XHC0_PME,
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.gpe = GEVENT_31,
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.direction = SMI_SCI_LVL_HIGH,
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.level = SMI_SCI_EDG
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},
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{
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.scimap = SMITYPE_XHC1_PME,
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.gpe = GEVENT_31,
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.direction = SMI_SCI_LVL_HIGH,
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.level = SMI_SCI_EDG
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}
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};
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enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe)
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{
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if (dev->bus->dev->path.type != DEVICE_PATH_PCI)
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return CB_ERR_ARG;
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if (dev->bus->dev->path.pci.devfn != PCIE_GPP_A_DEVFN)
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return CB_ERR_ARG;
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if (dev->path.type != DEVICE_PATH_PCI)
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return CB_ERR_ARG;
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if (dev->path.pci.devfn == XHCI0_DEVFN)
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*gpe = xhci_sci_sources[0].gpe;
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else if (dev->path.pci.devfn == XHCI1_DEVFN)
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*gpe = xhci_sci_sources[1].gpe;
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else
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return CB_ERR_ARG;
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return CB_SUCCESS;
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}
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static void configure_xhci_sci(void *unused)
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{
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if (soc_is_reduced_io_sku())
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gpe_configure_sci(xhci_sci_sources, 1);
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else
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gpe_configure_sci(xhci_sci_sources, ARRAY_SIZE(xhci_sci_sources));
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}
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BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY, configure_xhci_sci, NULL);
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