Paul Menzel 0d53e75d85 mb/amd/mandolin: mandolin: Fix typo in *Coprocessor* in comment ... This reduces the difference with Cereme’s devicetree file. Change-Id: I1e6ba5891245562d5132307eab224623031e11c8 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46559 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>		2020-12-04 13:41:02 +00:00
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acpi	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
arch	x86: Put bootblock startup code into .text._start section	2020-12-03 00:10:34 +00:00
commonlib	cbfs: mcache: Fix end-of-cache check	2020-12-03 21:21:11 +00:00
console	lib/trace: Remove TRACE support	2020-12-02 23:35:58 +00:00
cpu	mb/emulation/x86: Add optional parallel_mp init support	2020-12-04 11:12:13 +00:00
device	device: Drop unused HyperTransport code	2020-11-25 09:11:46 +00:00
drivers	drivers/intel/fsp2_0: FSP-T requires NO_CBFS_MCACHE	2020-12-04 11:00:45 +00:00
ec	src: Remove redundant use of ACPI offset(0)	2020-12-03 00:05:52 +00:00
include	cbfs: Add verification for RO CBFS metadata hash	2020-12-03 00:11:08 +00:00
lib	cbfs: Add verification for RO CBFS metadata hash	2020-12-03 00:11:08 +00:00
mainboard	mb/amd/mandolin: mandolin: Fix typo in *Coprocessor* in comment	2020-12-04 13:41:02 +00:00
northbridge	cbfs: Introduce cbfs_ro_map() and cbfs_ro_load()	2020-12-03 00:00:19 +00:00
security	cbfs: Add verification for RO CBFS metadata hash	2020-12-03 00:11:08 +00:00
soc	src/soc/intel/alderlake: Enable the PCH HDA	2020-12-04 07:05:43 +00:00
southbridge	cpu/qemu-x86: Add the option to have no SMM	2020-12-04 11:11:17 +00:00
superio	src: Remove redundant use of ACPI offset(0)	2020-12-03 00:05:52 +00:00
vendorcode	src: Remove redundant use of ACPI offset(0)	2020-12-03 00:05:52 +00:00
Kconfig	lib/trace: Remove TRACE support	2020-12-02 23:35:58 +00:00