1d748c5346
Invert the default instead of selecting it everywhere. Restores the ability to use its Kconfig prompt. Beside Qemu targets, the only platforms that didn't select it seem to be samsung/exynos5420, intel/cannonlake, and intel/icelake. The latter two were about to be patched anyway. Change-Id: I7c5b671b7dddb5c6535c97c2cbb5f5053909dc64 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/30891 Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
60 lines
1.2 KiB
Text
60 lines
1.2 KiB
Text
#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2014 Imagination Technologies
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; version 2 of
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# the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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if BOARD_GOOGLE_URARA
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select BOARD_ROMSIZE_KB_512
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select SPI_FLASH_WINBOND
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select CPU_IMGTEC_PISTACHIO
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select COMMON_CBFS_SPI_WRAPPER
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select SPI_FLASH
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config MAINBOARD_DIR
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string
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default "google/urara"
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config MAINBOARD_PART_NUMBER
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string
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default "ImgTec Pistachio Virtual Platform"
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config BOOTBLOCK_MAINBOARD_INIT
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string
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default "mainboard/google/urara/bootblock.c"
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config DRAM_SIZE_MB
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int
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default 256
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config TTYS0_LCS
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int
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default 3
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config CONSOLE_SERIAL_UART_ADDRESS
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hex
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depends on DRIVERS_UART
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default 0xB8101500
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config BOOT_DEVICE_SPI_FLASH_BUS
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int
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default 1
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config GBB_HWID
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string
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depends on CHROMEOS
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default "Urara TEST 1"
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endif
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