Hannah Williams 0f61da8582 soc/apollolake: Add SOC specific c-state table ... Please refer Apollolake BIOS Writers Guide Change-Id: I5f82cdc4b34a53b5184ef1e918cae15a1df6cc5e Signed-off-by: Hannah Williams <hannah.williams@intel.com> Reviewed-on: https://review.coreboot.org/15051 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>		2016-06-08 22:31:27 +02:00
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acpi	acpi/: add missing license header	2016-01-14 22:52:11 +01:00
arch	SMBIOS: Implement SKU field	2016-06-02 06:24:24 +02:00
commonlib	commonlib/lz4: Avoid unaligned memory access on RISC-V	2016-05-31 21:07:03 +02:00
console	console/post: be explicit about conditional cmos_post_log() compiling	2016-05-25 18:04:11 +02:00
cpu	AGESA vendorcode: Build a common amdlib	2016-05-18 10:44:43 +02:00
device	device: Add an ACPI device name and path concept to devices	2016-05-21 05:59:52 +02:00
drivers	drivers/intel/fsp1_1: Make weak routines quiet	2016-06-03 17:30:34 +02:00
ec	chromeec: Move EC image hash to separate file in CBFS	2016-06-03 17:24:26 +02:00
include	SMBIOS: Implement SKU field	2016-06-02 06:24:24 +02:00
lib	cbfs: Use NO_XIP_EARLY_STAGES to decide if stage is XIP	2016-06-02 17:21:39 +02:00
mainboard	mainboard/intel/amenia: Enable VIRT_DEV_SWITCH	2016-06-08 22:25:22 +02:00
northbridge	nb/intel/x4x: Fix unpopulated value	2016-06-04 23:46:05 +02:00
soc	soc/apollolake: Add SOC specific c-state table	2016-06-08 22:31:27 +02:00
southbridge	drivers/lenovo: Add hybrid graphics driver	2016-06-01 23:22:01 +02:00
superio	sio/winbond/w83667hg-a: Add pinmux defines for UART B	2016-05-29 19:34:54 +02:00
vendorcode	AGESA boards: Split dispatcher to romstage and ramstage	2016-06-04 23:44:33 +02:00
Kconfig	Add Board Checklist Support	2016-06-03 17:29:13 +02:00