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Maxim Polyakov 0f9c8b3aa5 mb/razer/blade_stealth_kbl: 2/3 Exclude fields to match PAD_CFG 
This patch excludes bit fields that must be ignored (1,2) in order
to convert current macros to target PAD_CFG_*() macros. The following
commands were used for this:

./intelp2m -fld cb -ign -t 1 -file ../../src/mainboard/razer/
blade_stealth_kbl/gpio.h

 - ignore RO bit fields;
 - ignore RX Level/Edge Configuration (bit 26:25) and RX/TX Buffer
   Disable (bit 9:8) for the native function, because it does not
   affect the pad in this mode.

This is part of the patch set
"mb/razer/blade_stealth_kbl/gpio: Rewrite pad config using intelp2m":

CB:43857 - 1/3 Decode raw register values
CB:43858 - 2/3 Exclude fields for PAD_CFG
CB:43411 - 3/3 Convert field macros to PAD_CFG

Change-Id: Ia36c5d0cd449a32d76351a87a33a55196ae78443
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43858
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Mimoja <coreboot@mimoja.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 		2020-09-21 08:09:05 +00:00
3rdparty Update amd_blobs submodule to upstream master 2020-09-17 19:46:18 +00:00
Documentation Documentation: Add ASan documentation 2020-09-21 07:45:37 +00:00
LICENSES drivers: Use SPDX identifiers 2020-05-25 22:19:21 +00:00
configs configs: Build test experimental x86_64 code 2020-08-19 10:54:45 +00:00
payloads libpayload: free: Separate NULL check out for clarity 2020-09-19 01:36:57 +00:00
src mb/razer/blade_stealth_kbl: 2/3 Exclude fields to match PAD_CFG 2020-09-21 08:09:05 +00:00
tests device/dram: Add method for converting MHz to MT/s 2020-09-16 03:24:50 +00:00
util util/intelp2m: Check keywords in common code 2020-09-21 08:07:26 +00:00
.checkpatch.conf
…
.clang-format
…
.editorconfig
…
.gitignore util: update .gitignore to ignore spd_tools binaries 2020-09-02 07:17:55 +00:00
.gitmodules 3rdparty: Add submodule intel-sec-tools 2020-09-09 13:08:25 +00:00
.gitreview
…
AUTHORS
…
COPYING
…
MAINTAINERS MAINTAINERS: Update soc/mediatek maintainership 2020-08-26 07:35:21 +00:00
Makefile build system: Rely on xcompile for HOSTCC and HOSTCXX 2020-07-08 08:53:46 +00:00
Makefile.inc sconfig: Switch to getopt 2020-09-18 17:50:00 +00:00
README.md README.md: Remove link to deprecated wiki 2019-11-16 20:39:55 +00:00
gnat.adc treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
toolchain.inc Remove MAYBE_STATIC_BSS and ENV_STAGE_HAS_BSS_SECTION 2020-05-26 15:04:08 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.