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Zheng Bao 1088bbff45 Features supported in RS780 code: 
* PCIe initialization.
  * Internal Graphics initialization.
  * HT Link initialization. It works in HT1 or HT3 mode.

Note:
1. I tried to add the description of every step to the code. For example,
   if it is made based on rpr, section 2.4.5, I will pasted the words
   from 2.4.5 to the c code. But the document I worked with might be
   different with the most updated one. A new section has been added and
   the 2.4.5 might be changed to 2.5.5. That migh lead to confusing. I
   correct every comment if I met one. But I have to confess that I am so
   reluctant to find out everyone. I believe it will be correct in the long
   run.
2. The interanl graphics part is done by Libo Feng <libo.feng@amd.com>.
3. There is a conflict between RPR and our CIM code. Please see the comment in
   switching_gppsb_configurations in rs780_pcie.c.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5219 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 		2010-03-16 01:41:14 +00:00
documentation update doxygen config file to latest doxygen version 2010-02-12 11:59:37 +00:00
payloads Trivial fix, use correct define. 2010-03-08 13:08:24 +00:00
src Features supported in RS780 code: 2010-03-16 01:41:14 +00:00
util Make CLANG selectable in Kconfig 2010-03-16 01:17:19 +00:00
COPYING update license template. 2006-08-12 22:03:36 +00:00
Makefile Make CLANG selectable in Kconfig 2010-03-16 01:17:19 +00:00
README Various minor fixes (trivial). 2010-02-25 16:09:53 +00:00

README 

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary
BIOS you can find in most of today's computers.

It performs just a little bit of hardware initialization and then executes
one of many possible payloads, e.g. a Linux kernel or a bootloader.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * gcc / g++
 * make
 * python

Optional:

 * doxygen (for generating/viewing documentation)
 * iasl (for targets with ACPI support)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig')


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
-------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.