4c2245eb67
This patch does two things which will take effect in follow-up patches: 1. Add an intermediate Makefile rule for dd'ing BL1 into the coreboot.rom pre-image. This is modeled after a similar hack for the bd82x6x southbridge. 2. Add a Kconfig variable, BOOTBLOCK_OFFSET, which will be used to pass the bootblock offset into cbfstool. Change-Id: I89da255dc903c387b754b06a11bb3439035ead87 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2093 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> |
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.. | ||
ace_sfr.h | ||
ace_sha.c | ||
ace_sha.h | ||
adc.h | ||
clk.h | ||
clock.c | ||
clock_init.c | ||
clock_init.h | ||
cpu.h | ||
dmc.h | ||
dmc_common.c | ||
dmc_init_ddr3.c | ||
dsim.h | ||
ehci-s5p.h | ||
exynos-cpufreq.h | ||
exynos-tmu.h | ||
exynos_cache.c | ||
fet.h | ||
fimd.h | ||
gpio.h | ||
i2s-regs.h | ||
Kconfig | ||
lowlevel_init.S | ||
lowlevel_init_c.c | ||
Makefile.inc | ||
mmc.h | ||
mshc.h | ||
periph.h | ||
pinmux.c | ||
pinmux.h | ||
power.c | ||
power.h | ||
pwm.h | ||
s5p-dp.h | ||
sata.c | ||
sata.h | ||
setup.h | ||
soc.c | ||
spi.h | ||
spl.c | ||
sys_proto.h | ||
sysreg.h | ||
tzpc.h | ||
tzpc_init.c | ||
uart.c | ||
uart.h | ||
watchdog.h |