1156b35a23
Change-Id: Ib3aafcc586b1631a75f214cfd19706108ad8ca93 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29285 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
76 lines
2.5 KiB
C
76 lines
2.5 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* ACPI support
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* written by Stefan Reinauer <stepan@openbios.org>
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* (C) 2005 Stefan Reinauer
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*
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* Copyright 2005 AMD
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* 2005.9 yhlu modify that to more dynamic for AMD Opteron Based MB
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*
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* Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
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*/
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#include <string.h>
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#include <assert.h>
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <arch/smp/mpspec.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <cpu/amd/amdfam10_sysconf.h>
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/* APIC */
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unsigned long acpi_fill_madt(unsigned long current)
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{
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struct device *dev;
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struct resource *res;
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/* create all subtables for processors */
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current = acpi_create_madt_lapics(current);
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/* Write NVIDIA CK804 IOAPIC. */
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dev = dev_find_slot(0x0, PCI_DEVFN(sysconf.sbdn + 0x1, 0));
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ASSERT(dev != NULL);
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res = find_resource(dev, PCI_BASE_ADDRESS_1);
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ASSERT(res != NULL);
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current,
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CONFIG_MAX_CPUS * CONFIG_MAX_PHYSICAL_CPUS, res->base, 0);
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/* Initialize interrupt mapping if mptable.c didn't. */
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if (!IS_ENABLED(CONFIG_GENERATE_MP_TABLE)) {
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/* Copied from mptable.c */
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/* Enable interrupts for commonly used devices (USB, SATA, etc.) */
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pci_write_config32(dev, 0x7c, 0x0d800018);
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pci_write_config32(dev, 0x80, 0xd8002009);
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pci_write_config32(dev, 0x84, 0x00000001);
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}
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/* IRQ9 */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH);
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/* IRQ14 */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 14, 14, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH);
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/* IRQ15 */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 15, 15, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH);
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/* create all subtables for processors */
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/* acpi_create_madt_lapic_nmis returns current, not size. */
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current = acpi_create_madt_lapic_nmis(current,
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MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, 1);
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return current;
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}
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