12a13e1f30
From a log of a machine using Crystal Well CPU [1], Crystal Well CPUs use some new PCI IDs. Without this patch, the Crystal Well northbridge cannot be initialized in ramstage, thus the machine cannot boot. Some PCI IDs of Crystal Well related devices can be found in the PCI ID database [2]. Tested with i5-4570R (with LGA1150 mod) on ASRock H81M-HDS. The board boots to SeaBIOS with boot screen displayed on HDMI output, and then boots Arch Linux on a USB disk. [1] https://mail.coreboot.org/hyperkitty/list/coreboot@coreboot.org/thread/DNHLQTNTRQT43T67DG7L2HVI5CV74ZCM/ [2] https://pci-ids.ucw.cz/read/PC/8086 Change-Id: Icfe55323fd06187148c788ebfa7b679b6944e4f3 Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41658 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
73 lines
1.7 KiB
C
73 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pciexp.h>
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#include <device/pci_ids.h>
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#include <assert.h>
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static void pcie_disable(struct device *dev)
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{
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printk(BIOS_INFO, "%s: Disabling device\n", dev_path(dev));
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dev->enabled = 0;
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}
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#if CONFIG(HAVE_ACPI_TABLES)
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static const char *pcie_acpi_name(const struct device *dev)
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{
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assert(dev);
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if (dev->path.type != DEVICE_PATH_PCI)
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return NULL;
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assert(dev->bus);
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if (dev->bus->secondary == 0)
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switch (dev->path.pci.devfn) {
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case PCI_DEVFN(1, 0):
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return "PEGP";
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case PCI_DEVFN(1, 1):
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return "PEG1";
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case PCI_DEVFN(1, 2):
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return "PEG2";
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};
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struct device *const port = dev->bus->dev;
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assert(port);
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assert(port->bus);
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if (dev->path.pci.devfn == PCI_DEVFN(0, 0) &&
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port->bus->secondary == 0 &&
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(port->path.pci.devfn == PCI_DEVFN(1, 0) ||
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port->path.pci.devfn == PCI_DEVFN(1, 1) ||
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port->path.pci.devfn == PCI_DEVFN(1, 2)))
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return "DEV0";
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return NULL;
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}
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#endif
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static struct device_operations device_ops = {
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.read_resources = pci_bus_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_bus_enable_resources,
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.scan_bus = pciexp_scan_bridge,
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.reset_bus = pci_bus_reset,
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.disable = pcie_disable,
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.init = pci_dev_init,
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.ops_pci = &pci_dev_ops_pci,
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#if CONFIG(HAVE_ACPI_TABLES)
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.acpi_name = pcie_acpi_name,
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#endif
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};
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static const unsigned short pci_device_ids[] = {
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0x0c01, 0x0c05, 0x0c09, 0x0c0d,
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0x0d01, 0x0d05, 0x0d09, /* Crystal Well */
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0 };
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static const struct pci_driver pch_pcie __pci_driver = {
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.ops = &device_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.devices = pci_device_ids,
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};
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