1c6d8a9cf4
They're listed in AUTHORS and often incorrect anyway, for example: - What's a "Copyright $year-present"? - Which incarnation of Google (Inc, LLC, ...) is the current copyright holder? - People sometimes have their editor auto-add themselves to files even though they only deleted stuff - Or they let the editor automatically update the copyright year, because why not? - Who is the copyright holder "The coreboot project Authors"? - Or "Generated Code"? Sidestep all these issues by simply not putting these notices in individual files, let's list all copyright holders in AUTHORS instead and use the git history to deal with the rest. Change-Id: I4c110f60b764c97fab2a29f6f04680196f156da5 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39610 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
48 lines
1.3 KiB
C
48 lines
1.3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/*
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* This file is created based on Intel Tiger Lake Processor PCH Datasheet
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* Document number: 575857
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* Chapter number: 3
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*/
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#include <console/console.h>
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#include <intelblocks/p2sb.h>
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void p2sb_soc_get_sb_mask(uint32_t *ep_mask, size_t count)
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{
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uint32_t mask;
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if (count != P2SB_EP_MASK_MAX_REG) {
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printk(BIOS_ERR, "Unable to program EPMASK registers\n");
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return;
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}
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/* Remove the host accessing right to PSF register range.
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* Set p2sb PCI offset EPMASK5 [29, 28, 27, 26] to disable Sideband
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* access for PCI Root Bridge.
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*/
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mask = (1 << 29) | (1 << 28) | (1 << 27) | (1 << 26);
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ep_mask[P2SB_EP_MASK_5_REG] = mask;
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/*
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* Set p2sb PCI offset EPMASK7 [31, 30] to disable Sideband
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* access for Broadcast and Multicast.
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*/
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mask = (1 << 31) | (1 << 30);
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ep_mask[P2SB_EP_MASK_7_REG] = mask;
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}
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