coreboot-kgpe-d16/src/southbridge
Angel Pons bf9bc50ec1 sb/intel/lynxpoint: Use PCI bitwise ops
Some cases could not be factored out while keeping reproducibility.
Also mark some potential bugs with a FIXME comment, since fixing them
while also keeping the binary unchanged is pretty much impossible.

Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 does not change.

Change-Id: I27d6aaa59e12a337f80a6d3387cc9c8ae5949384
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42154
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-07 11:02:43 +00:00
..
amd Change all assert(0) to BUG() 2020-08-03 05:15:15 +00:00
intel sb/intel/lynxpoint: Use PCI bitwise ops 2020-08-07 11:02:43 +00:00
ricoh/rl5c476 treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
ti sb/ti/pci7420: Drop dead code 2020-07-09 23:45:38 +00:00