ab5d6902fd
Add support for Kaby Lake RVP3.
Use kunimitsu at commit 028200f as base.
Kabylake RVP3 is based on Kabylake-Y with onboard Dual Channel
LPDDR3 DIMM.
* Update board name to kblrvp
* Remove fsp 1.1 specific code( As Kabylake uses fsp2.0)
* Remove board id function.
* Remove unused spd & add rvp3 spd file.
This is an initial commit does not have full support to boot.
Will add more CLs to boot Chrome OS with depthcharge.
Change-Id: Id8e32c5b93fc32ba84278c5c5da8f8e30c201bea
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/17032
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
38 lines
862 B
Text
38 lines
862 B
Text
FLASH@0xff000000 0x1000000 {
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SI_ALL@0x0 0x200000 {
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SI_DESC@0x0 0x1000
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SI_ME@0x1000 0x1ff000
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}
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SI_BIOS@0x200000 0xe00000 {
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RW_SECTION_A@0x0 0x3f0000 {
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VBLOCK_A@0x0 0x10000
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FW_MAIN_A(CBFS)@0x10000 0x3dffc0
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RW_FWID_A@0x3effc0 0x40
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}
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RW_SECTION_B@0x3f0000 0x3f0000 {
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VBLOCK_B@0x0 0x10000
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FW_MAIN_B(CBFS)@0x10000 0x3dffc0
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RW_FWID_B@0x3effc0 0x40
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}
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RW_MRC_CACHE@0x7e0000 0x10000
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RW_ELOG@0x7f0000 0x4000
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RW_SHARED@0x7f4000 0x4000 {
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SHARED_DATA@0x0 0x2000
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VBLOCK_DEV@0x2000 0x2000
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}
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RW_VPD@0x7f8000 0x2000
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RW_NVRAM@0x7fa000 0x6000
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RW_LEGACY(CBFS)@0x800000 0x200000
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WP_RO@0xa00000 0x400000 {
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RO_VPD@0x0 0x4000
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RO_UNUSED@0x4000 0xc000
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RO_SECTION@0x10000 0x3f0000 {
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FMAP@0x0 0x800
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RO_FRID@0x800 0x40
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RO_FRID_PAD@0x840 0x7c0
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GBB@0x1000 0xef000
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COREBOOT(CBFS)@0xf0000 0x300000
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}
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}
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}
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}
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