6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
32 lines
995 B
C
32 lines
995 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <FsptUpd.h>
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const FSPT_UPD temp_ram_init_params = {
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.FspUpdHeader = {
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.Signature = 0x545F4450554C5041ULL, /* 'APLUPD_T' */
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.Revision = 1,
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.Reserved = {0},
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},
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.FsptCommonUpd = {
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.Revision = 0,
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.Reserved = {0},
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/*
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* It is a requirement for firmware to have Firmware Interface Table
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* (FIT), which contains pointers to each microcode update.
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* The microcode update is loaded for all logical processors before
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* cpu reset vector.
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*
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* All SoC since Gen-4 has above mechanism in place to load microcode
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* even before hitting CPU reset vector. Hence skipping FSP-T loading
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* microcode after CPU reset by passing '0' value to
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* FSPT_UPD.MicrocodeRegionBase and FSPT_UPD.MicrocodeRegionLength.
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*/
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.MicrocodeRegionBase = 0,
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.MicrocodeRegionLength = 0,
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.CodeRegionBase =
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(uint32_t)(0x100000000ULL - CONFIG_ROM_SIZE),
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.CodeRegionLength = (uint32_t)CONFIG_ROM_SIZE,
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.Reserved1 = {0},
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},
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};
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