Tinghan Shen 2caa2fc56e soc/mediatek/mt8186: Add DEVAPC settings for ADSP ... Add DEVAPC permission settings for ADSP and set its domain number to 6. TEST=SOF driver is functional. BUG=b:204229221 Change-Id: I37bfea70386af953e89f3c38ac51e41af6aafa6e Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68290 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Yidi Lin <yidilin@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2022-10-14 16:03:06 +00:00
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common	soc/mediatek/mt8186: Add DEVAPC settings for ADSP	2022-10-14 16:03:06 +00:00
mt8173	soc/mediatek: Create GET_TICK_DLY_REG macro for SPI tick delay setting	2022-07-29 15:05:33 +00:00
mt8183	timer: Change timer util functions to 64-bit	2022-09-14 11:55:39 +00:00
mt8186	soc/mediatek/mt8186: Add DEVAPC settings for ADSP	2022-10-14 16:03:06 +00:00
mt8188	soc/mediatek/mt8188: Allow CPUfreq hardware to access MCUPM registers	2022-09-22 08:04:48 +00:00
mt8192	soc/mediatek: Use "if (!ptr)" in preference to "if (ptr == NULL)"	2022-09-14 12:49:44 +00:00
mt8195	soc/mediatek: a common implementation to register BL31 reset	2022-09-07 09:20:25 +00:00