coreboot-kgpe-d16/src/vendorcode
Julius Werner a7d924412a timestamps: You can never have enough of them!
Now that we have timestamps in pre-RAM stages, let's actually make use
of them. This patch adds several timestamps to both the bootblock and
especially the verstage to allow more fine-grained boot time tracking.

Some of the introduced timestamps can appear more than once per boot.
This doesn't seem to be a problem for both coreboot and the cbmem
utility, and the context makes it clear which operation was timestamped
at what point.

Also simplifies cbmem's timestamp printing routine a bit, fixing a
display bug when a timestamp had a section of exactly ",000," in it
(e.g. 1,000,185).

BRANCH=None
BUG=None
TEST=Booted Pinky, Blaze and Falco, confirmed that all timestamps show
up and contained sane values. Booted Storm (no timestamps here since it
doesn't support pre-RAM timestamps yet).

Change-Id: I7f4d6aba3ebe3db0d003c7bcb2954431b74961b3
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7a2ce81722aba85beefcc6c81f9908422b8da8fa
Original-Change-Id: I5979bfa9445a9e0aba98ffdf8006c21096743456
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/234063
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9608
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-14 09:03:40 +02:00
..
amd vendorcode/amd/agesa/f16kb: Enable support for AM1 socket 2015-04-10 15:29:24 +02:00
google timestamps: You can never have enough of them! 2015-04-14 09:03:40 +02:00
intel intel/rangeley: Update UPD_DATA_REGION to support POST-GOLD 2 FSP 2015-01-31 23:09:26 +01:00
Kconfig AMD Steppe Eagle: Add binary PI vendorcode files 2014-08-30 19:13:45 +02:00
Makefile.inc Add Intel FSP northbridge support Sandybridge and Ivybridge 2013-12-04 18:45:13 +01:00