13eada654c
BRANCH=none BUG=none TEST=build pass [pg: split into multiple commits] Change-Id: Ib46b243102969e2860479070e19640fb6cb9bdd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 3ee2a20ec56359e917bb8f4825846c54d4f6276a Original-Change-Id: Iedc81a85569b00524620e9ba128e7d77f17b0405 Original-Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/292666 Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/12614 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
72 lines
1.9 KiB
Makefile
72 lines
1.9 KiB
Makefile
##
|
|
## This file is part of the coreboot project.
|
|
##
|
|
## Copyright 2015 MediaTek Inc.
|
|
##
|
|
## This program is free software; you can redistribute it and/or modify
|
|
## it under the terms of the GNU General Public License as published by
|
|
## the Free Software Foundation; version 2 of the License.
|
|
##
|
|
## This program is distributed in the hope that it will be useful,
|
|
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
## GNU General Public License for more details.
|
|
##
|
|
|
|
ifeq ($(CONFIG_SOC_MEDIATEK_MT8173),y)
|
|
|
|
bootblock-y += bootblock.c
|
|
bootblock-y += cbfs.c
|
|
bootblock-y += pll.c
|
|
bootblock-y += spi.c
|
|
bootblock-y += timer.c
|
|
|
|
ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
|
|
bootblock-$(CONFIG_DRIVERS_UART) += uart.c
|
|
endif
|
|
|
|
bootblock-y += gpio.c gpio_init.c pmic_wrap.c mt6391.c
|
|
bootblock-y += wdt.c
|
|
bootblock-y += mmu_operations.c
|
|
|
|
################################################################################
|
|
|
|
verstage-y += spi.c
|
|
|
|
verstage-$(CONFIG_DRIVERS_UART) += uart.c
|
|
|
|
verstage-y += timer.c
|
|
verstage-y += wdt.c
|
|
verstage-y += cbfs.c
|
|
|
|
################################################################################
|
|
|
|
romstage-y += cbfs.c
|
|
romstage-y += timer.c
|
|
|
|
romstage-$(CONFIG_DRIVERS_UART) += uart.c
|
|
romstage-y += cbmem.c
|
|
romstage-y += spi.c
|
|
romstage-y += gpio.c
|
|
romstage-y += mmu_operations.c
|
|
|
|
################################################################################
|
|
|
|
ramstage-y += cbmem.c
|
|
ramstage-y += spi.c
|
|
ramstage-y += cbfs.c
|
|
ramstage-y += soc.c
|
|
ramstage-y += timer.c
|
|
ramstage-$(CONFIG_DRIVERS_UART) += uart.c
|
|
ramstage-y += gpio.c
|
|
ramstage-y += wdt.c
|
|
|
|
################################################################################
|
|
|
|
# Generate the actual coreboot bootblock code
|
|
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
|
|
./util/mtkheader/gen-bl-img.py mt8173 sf $< $@
|
|
|
|
CPPFLAGS_common += -Isrc/soc/mediatek/mt8173/include
|
|
|
|
endif
|