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Yen Lin 13fb74927e t210: i2c6: enable SOR_SAFE and DPAUX1 clocks for i2c6 to work
I2C6 controller needs SOR_SAFE and DPAUX1 clocks to work. These 2 clocks
are mistakenly enabled by MBIST. MBIST fix will be submitted next, which
will disable these 2 clocks as initial states. Enable these 2 clocks now
so I2C6 will continue to work after MBIST fix.

BUG=None
BRANCH=None
TEST=Tested on Smaug, make sure that panel shows display
     (I2C6 is used to turn on backlight)

Change-Id: Id47453e784d53fd6831e8d19a8d57c04c4e1f82f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 83e935f100be85e1e831a3f9f16962304f7cd7d6
Original-Signed-off-by: Yen Lin <yelin@nvidia.com>
Original-Change-Id: If312881c94570066bdc54f0f5c48226e862bddc6
Original-Reviewed-on: https://chromium-review.googlesource.com/282415
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/10840
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-09 00:09:08 +02:00
3rdparty vboot: Don't count boot attempts if lid is closed 2015-07-08 19:40:24 +02:00
Documentation Remove empty lines at end of file 2015-06-08 00:55:07 +02:00
payloads libpayload: update defconfigs 2015-07-08 10:25:11 +02:00
src t210: i2c6: enable SOR_SAFE and DPAUX1 clocks for i2c6 to work 2015-07-09 00:09:08 +02:00
util cbfstool: Make sure CBFS data structures are packed gcc style 2015-07-07 18:30:32 +02:00
.gitignore gitignore: Have multiple crossgcc versions 2015-05-25 21:26:02 +02:00
.gitmodules submodules: add arm-trusted-firmware third-party repository 2015-06-23 08:20:24 +02:00
.gitreview add .gitreview 2012-11-01 23:13:39 +01:00
COPYING
MAINTAINERS MAINTAINERS: grab build system responsibility 2015-05-22 22:47:03 +02:00
Makefile Makefile: Use variables defined for Kconfig 2015-06-30 18:53:54 +02:00
Makefile.inc payloads: Reorganize Makefile.incs for external payloads 2015-07-07 22:50:15 +02:00
README
toolchain.inc build system / amd64: Avoid GCC taking the ABI spec too literally 2015-07-08 19:38:35 +02:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * gcc / g++
 * make

Optional:

 * doxygen (for generating/viewing documentation)
 * iasl (for targets with ACPI support)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.