coreboot-kgpe-d16/src/southbridge
Martin Roth 9aa43892e6 Update SB800 CIMX FADT
- Add #define to allow the FADT PM Profile to be overridden.
 - Change the location of the PMA_CNT_BLOCK_ADDRESS to match
   current documentation.
 - cst_cnt should be 0 if smi_cmd == 0
 - add a couple of default access sizes.
 - Add a couple of #define values for unsupported C2 & C3 entries.
 - Add PM Profile override value into amd/persimmon platform.
   This does not use the #defines in acpi.h so that the files that
   include this don't all need to start including acpi.h.

Change-Id: Ib11ef8f9346d42fcf653fae6e2752d62a40a3094
Signed-off-by: Martin L Roth <martin@se-eng.com>
Reviewed-on: http://review.coreboot.org/1055
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-06-12 23:35:16 +02:00
..
amd Update SB800 CIMX FADT 2012-06-12 23:35:16 +02:00
broadcom Clean up #ifs 2012-05-08 00:34:34 +02:00
intel Provide functions to access arbitrary GPIO pins and vectors 2012-05-30 00:53:19 +02:00
nvidia Clean up #ifs 2012-05-08 00:34:34 +02:00
rdc Add support for RDC R8610 Southbridge 2012-03-27 18:39:05 +02:00
ricoh add functions to set Subsystem Vendor/Device to rl5c746 2011-02-28 18:09:58 +00:00
sis Clean up #ifs 2012-05-08 00:34:34 +02:00
ti remove trailing whitespace 2011-11-01 19:07:45 +01:00
via Clean up #ifs 2012-05-08 00:34:34 +02:00
Kconfig Add support for RDC R8610 Southbridge 2012-03-27 18:39:05 +02:00
Makefile.inc Add support for RDC R8610 Southbridge 2012-03-27 18:39:05 +02:00