coreboot-kgpe-d16/configs/config.google_reef_cros
Patrick Georgi e7864ceabc soc/intel/apollolake: Add reset code to postcar stage
Also add a test case for that, a config taken from chromiumos with some
references to binaries dropped that aren't in our blobs repo (eg audio
firmware).

Change-Id: I411c0bacefd9345326f26db4909921dddba28237
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/29223
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-10-23 07:11:31 +00:00

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CONFIG_USE_BLOBS=y
CONFIG_VENDOR_GOOGLE=y
CONFIG_BOARD_GOOGLE_REEF=y
CONFIG_CHROMEOS=y
CONFIG_ADD_FSP_BINARIES=y
CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE=y
CONFIG_ELOG_GSMI=y
CONFIG_ELOG_BOOT_COUNT=y
CONFIG_ELOG_BOOT_COUNT_CMOS_OFFSET=144
CONFIG_SPI_FLASH_SMM=y
# CONFIG_CONSOLE_SERIAL is not set
CONFIG_CMOS_POST=y
CONFIG_CMOS_POST_OFFSET=0x70
CONFIG_CMOS_POST_EXTRA=y
CONFIG_PAYLOAD_NONE=y