Felix Held 153f92adbe soc/amd/cezanne: add basic early FCH initialization to bootblock ... Change-Id: I1c6d32a5498a7adcee3c8c3145f85e9dba26bf7e Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48475 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>		2020-12-09 18:44:40 +00:00
..
acpi	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
arch	coreboot tables: Add SPI flash memory map windows to coreboot tables	2020-12-08 22:56:09 +00:00
commonlib	coreboot tables: Add SPI flash memory map windows to coreboot tables	2020-12-08 22:56:09 +00:00
console	lib/trace: Remove TRACE support	2020-12-02 23:35:58 +00:00
cpu	cpu/x86/64bit: Add code to call function in protected mode	2020-12-05 08:19:17 +00:00
device	device: Drop unused HyperTransport code	2020-11-25 09:11:46 +00:00
drivers	coreboot tables: Add SPI flash memory map windows to coreboot tables	2020-12-08 22:56:09 +00:00
ec	src: Remove redundant use of ACPI offset(0)	2020-12-03 00:05:52 +00:00
include	coreboot tables: Add SPI flash memory map windows to coreboot tables	2020-12-08 22:56:09 +00:00
lib	cbfs: Allow mcache to be found after the first lookup	2020-12-09 17:44:52 +00:00
mainboard	mb/google/volteer: Reorganize FMAP	2020-12-09 14:23:06 +00:00
northbridge	nb/intel/ironlake: Introduce memmap.h	2020-12-07 15:58:55 +00:00
security	cbfs: Add verification for RO CBFS metadata hash	2020-12-03 00:11:08 +00:00
soc	soc/amd/cezanne: add basic early FCH initialization to bootblock	2020-12-09 18:44:40 +00:00
southbridge	sb/intel/common: Modify CONFIG_LOCK_MANAGEMENT_ENGINE behavior	2020-12-07 14:06:28 +00:00
superio	src: Remove redundant use of ACPI offset(0)	2020-12-03 00:05:52 +00:00
vendorcode	vc/intel/fsp/fsp2_0/cooperlake_sp: Update WW47 FSP Memory map HOB	2020-12-07 10:30:09 +00:00
Kconfig	lib/trace: Remove TRACE support	2020-12-02 23:35:58 +00:00