coreboot-kgpe-d16/src/cpu/Kconfig

# Warning: This file is included whether or not the if is here.
# The if controls how the evaluation occurs.
# (See also src/Kconfig)

source "src/cpu/*/Kconfig"

if ARCH_X86

config DCACHE_RAM_BASE
	hex

config DCACHE_RAM_SIZE
	hex

config DCACHE_BSP_STACK_SIZE
	hex

config EARLYRAM_BSP_STACK_SIZE
	depends on RESET_VECTOR_IN_RAM
	hex

config SMP
	bool
	default y if MAX_CPUS != 1
	default n
	help
	  This option is used to enable certain functions to make coreboot
	  work correctly on symmetric multi processor (SMP) systems.

config	MMX
	bool
	help
	  Select MMX in your socket or model Kconfig if your CPU has MMX
	  streaming SIMD instructions.

config SSE
	bool
	help
	  Select SSE in your socket or model Kconfig if your CPU has SSE
	  streaming SIMD instructions.

config SSE2
	bool
	default n
	select SSE
	help
	  Select SSE2 in your socket or model Kconfig if your CPU has SSE2
	  streaming SIMD instructions. Some parts of coreboot can be built
	  with more efficient code if SSE2 instructions are available.

endif # ARCH_X86

config SUPPORT_CPU_UCODE_IN_CBFS
	bool
	default n

config USES_MICROCODE_HEADER_FILES
	def_bool n
	select SUPPORT_CPU_UCODE_IN_CBFS
	help
	  This is selected by a board or chipset to set the default for the
	  microcode source choice to a list of external microcode headers

config MICROCODE_BLOB_NOT_IN_BLOB_REPO
	bool
	help
	  Selected by platforms that don't maintain microcode updates in the
	  blobs repo yet.

config MICROCODE_BLOB_NOT_HOOKED_UP
	bool
	help
	  Selected by platforms that haven't hooked microcode updates up yet.

config MICROCODE_BLOB_UNDISCLOSED
	bool
	help
	  Selected by work-in-progress platforms that don't have microcode
	  updates available yet.

config USE_CPU_MICROCODE_CBFS_BINS
	bool
	help
	  Automatically selected below to add binary microcode files
	  (`cpu_microcode_bins` in the makefiles) to CBFS.

choice
	prompt "Include CPU microcode in CBFS" if ARCH_X86
	default CPU_MICROCODE_CBFS_EXTERNAL_HEADER if USES_MICROCODE_HEADER_FILES
	default CPU_MICROCODE_CBFS_NONE if MICROCODE_BLOB_NOT_IN_BLOB_REPO || \
					   MICROCODE_BLOB_NOT_HOOKED_UP || \
					   MICROCODE_BLOB_UNDISCLOSED
	depends on SUPPORT_CPU_UCODE_IN_CBFS

config CPU_MICROCODE_CBFS_DEFAULT_BINS
	bool "Generate from tree"
	select USE_CPU_MICROCODE_CBFS_BINS
	depends on !(MICROCODE_BLOB_NOT_IN_BLOB_REPO || \
		     MICROCODE_BLOB_NOT_HOOKED_UP || \
		     MICROCODE_BLOB_UNDISCLOSED)
	help
	  Select this option if you want microcode updates to be assembled when
	  building coreboot and included in the final image as a separate CBFS
	  file. Microcode will not be hard-coded into ramstage.

	  The microcode file may be removed from the ROM image at a later
	  time with cbfstool, if desired.

	  If unsure, select this option.

config CPU_MICROCODE_CBFS_EXTERNAL_BINS
	bool "Include external microcode binary"
	select USE_CPU_MICROCODE_CBFS_BINS
	help
	  Select this option if you want to include external binary files
	  in the CPUs native format. They will be included as a separate
	  file in CBFS.

	  A word of caution: only select this option if you are sure the
	  microcode that you have is newer than the microcode shipping with
	  coreboot.

	  The microcode file may be removed from the ROM image at a later
	  time with cbfstool, if desired.

	  If unsure, and applicable, select "Generate from tree"

config CPU_MICROCODE_CBFS_EXTERNAL_HEADER
	bool "Include external microcode header files"
	help
	  Select this option if you want to include external c header files
	  containing the CPU microcode. This will be included as a separate
	  file in CBFS.

	  A word of caution: only select this option if you are sure the
	  microcode that you have is newer than the microcode shipping with
	  coreboot.

	  The microcode file may be removed from the ROM image at a later
	  time with cbfstool, if desired.

	  If unsure, and applicable, select "Generate from tree"

config CPU_MICROCODE_CBFS_NONE
	bool "Do not include microcode updates"
	help
	  Select this option if you do not want CPU microcode included in CBFS.

	  Microcode may be added to the ROM image at a later time with cbfstool,
	  if desired.

	  If unsure, and applicable, select "Generate from tree"

	  The GOOD:
	  Microcode updates intend to solve issues that have been discovered
	  after CPU production. The expected effect is that systems work as
	  intended with the updated microcode, but we have also seen cases where
	  issues were solved by not applying microcode updates.

	  The BAD:
	  Note that some operating system include these same microcode patches,
	  so you may need to also disable microcode updates in your operating
	  system for this option to have an effect.

	  The UGLY:
	  A word of CAUTION: some CPUs depend on microcode updates to function
	  correctly. Not updating the microcode may leave the CPU operating at
	  less than optimal performance, or may cause outright hangups.
	  There are CPUs where coreboot cannot properly initialize the CPU
	  without microcode updates
	  For example, if running with the factory microcode, some Intel
	  SandyBridge CPUs may hang when enabling CAR, or some VIA Nano CPUs
	  will hang when changing the frequency.

	  Make sure you have a way of flashing the ROM externally before
	  selecting this option.

endchoice

config CPU_MICROCODE_HEADER_FILES
	string "List of space separated microcode header files with the path"
	depends on CPU_MICROCODE_CBFS_EXTERNAL_HEADER
	help
	  A list of one or more microcode header files with path from the
	  coreboot directory.  These should be separated by spaces.

config CPU_UCODE_BINARIES
	string "Microcode binary path and filename"
	depends on CPU_MICROCODE_CBFS_EXTERNAL_BINS
	default ""
	help
	  Some platforms have microcode in the blobs directory, and these can
	  be hardcoded in the makefiles.  For platforms with microcode
	  binaries that aren't in the makefile, set this option to pull
	  in the microcode.

	  This should contain the full path of the file for one or more
	  microcode binary files to include, separated by spaces.

	  If unsure, leave this blank.