57 lines
1.5 KiB
C
57 lines
1.5 KiB
C
/*
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* This file is part of the libpayload project.
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*
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* Copyright (C) 2014 Imagination Technologies
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#include <libpayload.h>
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#include <arch/cpu.h>
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#include <arch/io.h>
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#define PISTACHIO_CLOCK_SWITCH 0xB8144200
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#define MIPS_EXTERN_PLL_BYPASS_MASK 0x00000002
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/**
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* @ingroup arch
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* Global variable containing the speed of the processor in KHz.
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*/
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u32 cpu_khz;
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/**
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* Calculate the speed of the processor for use in delays.
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*
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* @return The CPU speed in kHz.
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*/
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unsigned int get_cpu_speed(void)
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{
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if (IMG_PLATFORM_ID() != IMG_PLATFORM_ID_SILICON)
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cpu_khz = 50000; /* FPGA board */
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else {
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/* If MIPS PLL external bypass bit is set, it means
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* that the MIPS PLL is already set up to work at a
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* frequency of 550 MHz; otherwise, the crystal is
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* used with a frequency of 52 MHz
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*/
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if (read32(PISTACHIO_CLOCK_SWITCH) &
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MIPS_EXTERN_PLL_BYPASS_MASK)
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cpu_khz = 550000;
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else
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cpu_khz = 52000;
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}
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return cpu_khz;
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}
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