af983db3f4
Add template directories for the Waddledee and Waddledoo reference boards of the Dedede baseboard. BUG=b:157183582 BRANCH=None TEST=N/A Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Change-Id: Ida70a44097334991a93fec8f4933d7f6e39a187b Reviewed-on: https://review.coreboot.org/c/coreboot/+/41640 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
58 lines
1.5 KiB
Text
58 lines
1.5 KiB
Text
chip soc/intel/jasperlake
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# USB Port Configuration
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register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera
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# Intel Common SoC Config
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#+-------------------+---------------------------+
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#| Field | Value |
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#+-------------------+---------------------------+
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#| GSPI0 | cr50 TPM. Early init is |
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#| | required to set up a BAR |
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#| | for TPM communication |
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#| | before memory is up |
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#| I2C0 | Trackpad |
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#| I2C1 | Digitizer |
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#| I2C2 | Touchscreen |
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#| I2C3 | Camera |
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#| I2C4 | Audio |
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#+-------------------+---------------------------+
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register "common_soc_config" = "{
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.gspi[0] = {
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.speed_mhz = 1,
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.early_init = 1,
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},
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.i2c[0] = {
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.speed = I2C_SPEED_FAST,
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.rise_time_ns = 66,
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.fall_time_ns = 90,
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.data_hold_time_ns = 350,
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},
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.i2c[1] = {
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.speed = I2C_SPEED_FAST,
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},
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.i2c[2] = {
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.speed = I2C_SPEED_FAST,
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},
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.i2c[3] = {
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.speed = I2C_SPEED_FAST,
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},
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.i2c[4] = {
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.speed = I2C_SPEED_FAST,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_lcnt = 176,
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.scl_hcnt = 95,
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.sda_hold = 36,
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}
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},
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}"
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device domain 0 on
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device pci 14.0 on end
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device pci 15.0 on end
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device pci 15.2 on end
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device pci 1c.7 on end
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device pci 19.0 on end
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device pci 1f.3 on end
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end
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end
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