Subrata Banik 160fbe5cc2 soc/intel/cannonlake: Reduce STACK_SIZE to 4KiB ... TEST=Build and boot cannonlake rvp till OS. Change-Id: I5369afd0d1d66e25d210416730a2c1c91ca8e94a Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/26345 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2018-05-25 02:00:16 +00:00
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apollolake	soc/intel/apollolake: Bypass FSP's CpuMemorytest, PCIe pwr seq & SPI Init	2018-05-22 15:52:20 +00:00
baytrail	soc/intel/baytrail: Get rid of device_t	2018-05-24 18:38:25 +00:00
braswell	{mb,nb,soc}: Remove references to pci_bus_default_ops()	2018-05-08 03:01:04 +00:00
broadwell	{mb,nb,soc}: Remove references to pci_bus_default_ops()	2018-05-08 03:01:04 +00:00
cannonlake	soc/intel/cannonlake: Reduce STACK_SIZE to 4KiB	2018-05-25 02:00:16 +00:00
common	soc/intel: Add support for USB ACPI code generation	2018-05-18 12:23:04 +00:00
denverton_ns	bootblock: Allow more timestamps in bootblock_main_with_timestamp()	2018-05-22 02:39:11 +00:00
fsp_baytrail	{mb,nb,soc}: Remove references to pci_bus_default_ops()	2018-05-08 03:01:04 +00:00
fsp_broadwell_de	soc/intel/fsp_broadwell_de: Spell verb *set up* with space	2018-05-08 14:23:48 +00:00
quark	bootblock: Allow more timestamps in bootblock_main_with_timestamp()	2018-05-22 02:39:11 +00:00
skylake	src: Remove non-ascii characters	2018-05-22 02:54:24 +00:00
Kconfig	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00