coreboot-kgpe-d16/src
Alexandru Gagniuc 1896996589 mainboard: Do not redefine CONSOLE_POST Kconfig variable
This option is already defined in console/Kconfig, and is intended
to be controlled by the user. Only six boards in the entire tree
redefined it, so remove the definition from those boards.

Change-Id: I3a65444f63c93c01d78569a9a7eb01158fb290bd
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/8457
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Martin Roth <gaumless@gmail.com>
2015-02-24 06:41:16 +01:00
..
arch Remove */cpu/amd/agesa/* from excluded illegal globals file 2015-02-23 10:39:43 +01:00
console CBMEM console: Fix and enhance pre-RAM support 2015-01-27 22:44:17 +01:00
cpu AMD Fam10h: Don't write uninitialized data into ACPI 2015-02-23 20:33:45 +01:00
device device/device_util.c: Add space after ellipse for better legibility 2015-02-15 09:21:09 +01:00
drivers drivers/xgi: Avoid double-free 2015-02-23 20:33:38 +01:00
ec acpi: Generate valid ACPI processor objects 2015-02-16 21:02:30 +01:00
include AMD K8 fam10: Refactor offset_unitid configuration 2015-02-20 07:04:00 +01:00
lib x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
mainboard mainboard: Do not redefine CONSOLE_POST Kconfig variable 2015-02-24 06:41:16 +01:00
northbridge AMD binaryPI: Drop HT3_SUPPORT 2015-02-20 07:56:09 +01:00
soc soc/fsp_baytrail: Fix use of microcode-related Kconfig variables 2015-02-24 06:41:05 +01:00
southbridge AMD cimx/sb800: Disconnect PCI bridge 0:14.4 from pins 2015-02-23 21:33:55 +01:00
superio superio/fintek/f81216h: Add the correct unlock key values 2015-02-14 00:53:26 +01:00
vendorcode AMD cimx/sb800: Disable unused GPP ports 2015-02-14 22:37:33 +01:00
Kconfig nvram: Add option to reset NVRAM to default parameters on every boot 2015-02-16 08:36:37 +01:00