18e434d1d3
Use the apps processor watchdog reset to do a hard reset. The watchdog reset drives the RESETOUT on the chip. Modify register address definitions to be able to use pointers and pointer arithmetics. BRANCH=storm BUG=chrome-os-partner:34334 TEST=the chip resets and the control returns to start of SBL. Change-Id: Ib5772ab152b27058fde1be9de2d2ac26bfe00ca4 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: d50413cb614ef05ada93be1252fe5ef617a94d91 Original-Change-Id: I9b249d057b473429335587f7241ca462b4a6a8b7 Original-Signed-off-by: Deepa Dinamani <deepad@codeaurora.org> Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/236141 Original-Reviewed-by: Trevor Bourget <tbourget@codeaurora.org> Reviewed-on: http://review.coreboot.org/9691 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> |
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| .. | ||
| include/soc | ||
| blobs_init.c | ||
| cbmem.c | ||
| clock.c | ||
| gpio.c | ||
| gsbi.c | ||
| i2c.c | ||
| Kconfig | ||
| Makefile.inc | ||
| mbn_header.h | ||
| qup.c | ||
| soc.c | ||
| spi.c | ||
| timer.c | ||
| tz_wrapper.S | ||
| uart.c | ||
| usb.c | ||