1a1b04ea51
Change-Id: I1157cf391178a27db437d1d08ef5cb9333e976d0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38233 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
34 lines
768 B
C
34 lines
768 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include <device/pci_def.h>
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#include <device/smbus_host.h>
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#include "pch.h"
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uintptr_t smbus_base(void)
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{
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return SMBUS_IO_BASE;
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}
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int smbus_enable_iobar(uintptr_t base)
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{
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/* Set the SMBus device statically. */
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pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3);
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/* Check to make sure we've got the right device. */
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if (pci_read_config16(dev, PCI_VENDOR_ID) != PCI_VENDOR_ID_INTEL)
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return -1;
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/* Set SMBus I/O base. */
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pci_write_config32(dev, SMB_BASE,
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base | PCI_BASE_ADDRESS_SPACE_IO);
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/* Set SMBus enable. */
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pci_write_config8(dev, HOSTC, HST_EN);
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/* Set SMBus I/O space enable. */
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pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO);
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return 0;
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}
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